W02-04_MemOrganization

W02-04_MemOrganization - 04 04 Memory Organization CSC 230...

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4 Memory Organization 04 Memory Organization CSC 230
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A Conceptual Model of Memory Space 0000 0001 0002 Memory is an array ± ach location has a unique address 0003 0004 0005 0006 each location has a unique address ± the address is the index that identifies the location in the 0007 0008 0009 00A memory space ± each location holds a fixed amount f formation 000A 000B : : of information ± a 16-bit address allows for 65,636 (64K) addressable memory 000F 0010 : locations Î WHY? : : FFFF 4
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What is it Meant by “Memory Addressing”? Address Content 0000 0001 0002 ± memory is a sequence of directly addressable “locations” 012A 009 0003 0004 0005 0006 ± content of each location is just bits Î they can be viewed as data, 0009 0007 0008 0009 00A instructions, other addresses, etc. ± any piece of information in memory has 2 components: 12B3 000A 000B : : Î address and content 000F 0010 : Address Content he ddress a ointer the cation here : : FFFF the address is a pointer to the location where we want to use the content
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Memory Addressing ± CPU supplies the address on the address bus ± The content for a location is transmitted on the data bus transfer of data om emory is a ead ± A transfer of data from memory is a read . ± A transfer of data to memory is a write . Address bus emory CPU Memory Data bus 6
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Memory Addressing, Read & Write: the Sequence EAD RITE READ 1. CPU supplies the address on the address bus WRITE 1. CPU supplies the address on the address bus 2. READ signal is placed on the control bus 3. Wait for memory to respond 2. CPU places content for the given location on the data bus 4. The content is transmitted on the data bus from memory to CPU 3 .W R I T E s ignal is placed on the control bus Address bus Memory Control bus CPU Data bus 7
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Addressing – the overall view 1. Memory organization implies: ± Sequence of locations of same size ± Consecutive bytes form words, half words, double words. here is a unique address for each location ± There is a unique address for each location 2. Size of the address bus ± determines the address space f the system, p o y, ±
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W02-04_MemOrganization - 04 04 Memory Organization CSC 230...

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