Quiz5Soln - CDA3101 Quiz 5 Fall 2010 Last Name _ First Name...

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CDA3101 Quiz 5 Last Name ____________________ Fall 2010 First Name ____________________ 1. Consider the single-cycle datapath and control shown on the next page. a) (4 points) Assume that the single-cycle datapath is executing the instruction: sw $t0, 24($t1). Indicate the value (in binary) of each of the control signals in the table below. You should show the values that would exist in the circuit after all the “work” of the instruction has completed, right before the moment that the rising edge of the next clock cycle occurs. You should write “X” if the control signal doesn’t matter. A 0 or 1 for a value for a signal that does not matter will be considered incorrect. Control Signal Value (0/1/X) RegWrite 0 MemtoReg X RegDst X MemRead 0 MemWrite 1 ALUSrc 1 Branch 0 Control bits (4) to the ALU (specify all 4 bits) 0010 2 b) (3 points) Can we get rid of the AND gate and the Branch signal in the diagram and instead let the zero signal from the ALU be the only control signal for the multiplexor at the top? Give an example to justify your answer.
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Quiz5Soln - CDA3101 Quiz 5 Fall 2010 Last Name _ First Name...

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