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Unformatted text preview: Lecture 5: Introduction to electronic analog circuits 361-1-3661 1 Our main aim is to analyze the drawbacks of the bias in the elementary transistor circuits and to suggest a better solution for both discrete and integrated electronic circuits. 2.1. Drawbacks of the bias in the elementary transistor circuits The elementary biasing has the two following main drawbacks. Excessive use of static sources The first drawback is related to the need to use too many static signal sources in multi-stage electronic circuits. The V BE source in Fig. 1(a) is not universal : it cannot be used for biasing other stages. Transistors in other stages may need a different base-emitter voltage, either due to the difference in their parameters or the difference in their static states. It is also a complex task to connect a single V BE source to a number of stages and to decouple it from individual signal sources in each stage. Thermal instability The second drawback of the elementary biasing is related to its thermal instability caused by: δ β F =0.1 - 0.3%/°C, Δ V BE =- 2 mV/°C [see Fig. 1 (b)], δ I CBo =100% /10°C [see Fig. 1 (c)], where δ denotes the relative change, Δ denotes the absolute change in the corresponding variable, and I CBo is the leakage current due to the discontinuity of the semiconductor just beneath its surface [see Fig. 1(c)]. The silicon atoms that are located just beneath the surface do not have neighbors above them. As a result, each of them has a vacancy that can be used by electrons to travel from atom to atom. The typical value of the leakage current is below 100 pA. (It is obvious that the leakage current is proportional to the voltage between the terminals, there is no leakage if there is no difference between the electrical potential of the terminals.) To consider the leakage current we add in Fig. 1(d) an I CBo source to the ideal, leakage-free transistor. Note that we consider only the leakage current of the reverse biased C-B junction and do not consider the leakage current of the forward biased B-E junction. This is because both the static and dynamic impedances of a forward biased junction are relatively low, and the connected in parallel relatively high v O V CC v s R C V BB CE I C V BE V CE 0.5( V CC- V BE ) V O max = V CC V O min = V BE 0.5( V CC- V BE ) V O V CE V BE =V T ln( I B / I BS ) R C =0.5( V CC- V BE )/ I C I B =I C / β F I B v BE i B I B Δ V BE Q T V CE Q' V BE =V T ln( I B / I BS ) δ I BS =100%/5 o C Δ V BE =- 2mV/ o C C B E p V CB I CBo Si (a) (b) (c) p n n I CBo B E C (d)- I CBo Fig. 1. Biasing the elementary CE amplifier. (a) Circuit. (b) The dependence of V BE on temperature (for a fixed I B ). (c) The leakage current I CBo due to the discontinuity of the semiconductor just beneath its surface. (d) Including the leakage current into the transistor model....
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This note was uploaded on 01/14/2012 for the course EE 361-1-3711 taught by Professor Prof.eugenepaperno during the Fall '11 term at Ben-Gurion University.
- Fall '11