MidtermFall2009_594BB

MidtermFall2009_594BB - University of California, Santa...

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Unformatted text preview: University of California, Santa Barbara Department of Electrical & Computer Engineering CMOS VLSI for Computer Engineering 194BB/594BB Professor Theogarajan Midterm Exam, November 9, 2009 Name: This is open book and open notes exam. Undergraduates have to only answer any 4 ques- tions . For all questions make reasonable approximations. Unless otherwise specified ignore body effect. All necessary formulas and values are given at the end of the exam for your convenience. GOOD LUCK! Answer the questions in the spaces provided on the question sheets. If you run out of room for an answer, continue on the back of the page. Question Points Score 1 20 2 20 3 20 4 20 5 20 Total: 100 ECE 194A/594A Midterm Exam November 9, 2009 1. Question 1: 20points Consider the logic path shown in figure 1 Figure 1: Question 1 (a) (10 points) Size the gates for the minimum possible delay and calculate the path delay given that an inverter with an fan-out of 4 has a delay of 60ps. ECE 194A/594A Midterm Exam (Continued) November 9, 2009 (b) (10 points) Is it possible to decrease the overall path delay by introducing inverters...
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This note was uploaded on 01/16/2012 for the course ECE 223 taught by Professor Luketheogarajan during the Fall '11 term at UCSB.

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MidtermFall2009_594BB - University of California, Santa...

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