Finite_State_Machine_FSM_ - 1 Finite State Machines State...

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Unformatted text preview: 1 Finite State Machines State Diagrams vs. Algorithmic State Machine (ASM) Charts 2 Required reading S. Brown and Z. Vranesic, Fundamentals of Digital Logic with VHDL Design Chapter 8, Synchronous Sequential Circuits Sections 8.1-8.5 Chapter 8.10, Algorithmic State Machine (ASM) Charts 3 Datapath vs. Controller 4 Structure of a Typical Digital System Datapath (Execution Unit) Controller (Control Unit) Data Inputs Data Outputs Control Inputs Control Outputs Control Signals Status Signals 5 Datapath (Execution Unit) Manipulates and processes data Performs arithmetic and logic operations, shifting, and other data-processing tasks Is composed of registers, gates, multiplexers, decoders, adders, comparators, ALUs, etc. Provides all necessary resources and interconnects among them to perform specified task Interprets control signals from the Controller and generates status signals for the Controller 6 Controller (Control Unit) Controls data movements in the Datapath by switching multiplexers and enabling or disabling resources Example: enable signals for registers Example: control signals for muxes Provides signals to activate various processing tasks in the Datapath Determines the sequence the operations performed by Datapath Follows Some Program or Schedule 7 Controller Controller can be programmable or non-programmable Programmable Has a program counter which points to next instruction Instructions are held in a RAM or ROM externally Microprocessor is an example of programmable controller Non-Programmable Once designed, implements the same functionality Another term is a hardwired state machine or hardwired instructions We will be focusing primarily on the non- programmable type in this course 8 Finite State Machines Digital Systems and especially their Controllers can be described as Finite State Machines (FSMs) Finite State Machines can be represented using State Diagrams and State Tables- suitable for simple digital systems with a relatively few inputs and outputs Algorithmic State Machine (ASM) Charts- suitable for complex digital systems with a large number of inputs and outputs 9 Hardware Design with RTL VHDL Pseudocode Datapath Controller Block diagram Block diagram State diagram or ASM chart VHDL code VHDL code VHDL code Interface 10 Finite State Machines Refresher 11 Finite State Machines (FSMs) Any Circuit with Memory Is a Finite State Machine Even computers can be viewed as huge FSMs Design of FSMs Involves Defining states Defining transitions between states Optimization / minimization Manual Optimization/Minimization Is Practical for Small FSMs Only 12 Moore FSM Output Is a Function of a Present State Only Present State register Next State function Output function Inputs Present State Next State Outputs clock reset 13 Mealy FSM Output Is a Function of a Present State and Inputs Next State function Output function Inputs Present State Next State Outputs Present State register clock reset 14 State Diagrams 15 Moore Machine state 1 / output 1 state 2 / output 2 transition condition 1 transition condition 2 16 Mealy Machine state 1 state 2 transition condition 1 / output 1 transition condition 2 / output 2 17...
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Finite_State_Machine_FSM_ - 1 Finite State Machines State...

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