11_iddq_p6

11_iddq_p6 - Outline IDDQ Testing How does IDDQ detect...

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1 © K.T. Tim Cheng 11_iddq, v1.0 2 © K.T. Tim Cheng 11_iddq, v1.0 •H o w d o e s I DDQ detect defects? •I DDQ test patterns DDQ measurement •C a s e s t u d i e s Design for I DDQ testability New challenges of I DDQ testing Outline - I DDQ Testing 3 © K.T. Tim Cheng 11_iddq, v1.0 I DDQ - Detecting Defects +V DD V SS (Ground) V out V in I DD CMOS Inverter V in V out I DDQ I DDT No Defect I DDQ Measure Failure Analysis by Measuring Power Supply Current Ex. Gate-Oxide Short Circuit (V gd ) (high resistance) Defect 4 © K.T. Tim Cheng 11_iddq, v1.0 Example: n-Channel Gate Oxide Short V 1 V S V 2 V 3 V out V DD I DD SS Defect 5 © K.T. Tim Cheng 11_iddq, v1.0 V 1 V s V 2 V 3 V out V DD Defect 3V 3V V 2 V 1 (.3V /div) V S (.3 V /div) 10 -2 A 3V 3V V S (.3V /div) V 3 I DD (Decade/ div) V 3 I DD n-Channel Gate Oxide Short Effects on Logic Voltage 6 © K.T. Tim Cheng 11_iddq, v1.0 Example - Bridge Defect V out 3 V 0 V 3 V 3 V Defect Bridge 0.5 1.0 1.5 2.0 1.0 2.0 V out (v) Kp/Kn
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7 © K.T. Tim Cheng 11_iddq, v1.0 A Basic Question If defect may not affect circuit logical behavior, Why bother?? Three reasons, at least: 1. Defect may indicate a latent reliability problem 2. Additional current drain for low-power devices 3. Indication of processing problem 8 © K.T. Tim Cheng 11_iddq, v1.0 I DDQ Test Patterns z I DDQ testing refers to the measurement of quiescent power supply current (I DDQ ) in CMOS circuits to cover many types of defects. z An I DDQ test pattern set consists of test vectors used for I DDQ measurement z If the CUT contains defect targeted by an I DDQ test vector, the CUT draws excessive quiescent current for the test vector. z I DDQ test patterns are also used for defect diagnosis, and can lead to specific defective devices to the IC. 9 © K.T. Tim Cheng 11_iddq, v1.0 Requirements for I DDQ Test Patterns z A test vector must create one or more low resistance paths from VDD to VSS in the presence of target defect(s) P1 N1 P2 N2 1 1 0 f GS P1 N1 P2 N2 0 0 1 f GS z The acceptable number of I DDQ test vectors is several orders of magnitude less than what may be reasonable for voltage based logic testing 10 © K.T. Tim Cheng 11_iddq, v1.0 I DDQ Test - Principle Techniques 1. Every Vector I DDQ 2. Selective I DDQ • A few (~ 10 - 20) • Nodal activity • Functional Patterns (e.g., Quietest - 1%)
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11_iddq_p6 - Outline IDDQ Testing How does IDDQ detect...

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