ECE_220A_Matrls_215A_Final_Exam_2011

ECE_220A_Matrls_215A_Final_Exam_2011 - ECE 220A/MAT ...

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Unformatted text preview: ECE 220A/MAT 215A Nov 21, 2011 FINAL EXAMINATION Take-home DUE: before 2pm Friday, December 9th, 2011 Paper copies of the homework must be handed in to either the instructor or a TA and an electronic version uploaded on Gaucho Space (Maximum 7 pages) For your Final Exam, please choose ONE of two projects described below. One project is the fabrication of MEMS tunable Vertical Cavity Laser (VCSEL). The other project is the fabrication of an Arrayed Waveguide Grating (AWG) with an integral detector for an optical wavelength division multiplexer system. I. MEMS TUNABLE CAVITY LASER (VCSEL) VERTICAL Semiconductor processing techniques allow large numbers of small scale mechanical devices and microelectromechanical systems (MEMS) to be fabricated with exquisite precision and reproducibility at low cost. MEMS devices offer numerous possibilities for making systems with new function. The operation and fabrication of a MEMS tunable Vertical Cavity Surface Emitting Laser (VCSEL) is described in reference 1. Assume that you are given a Si wafer with the same epitaxial layers as those in Reference 1 bonded to the Si, describe the process of how you could fabricate a MEMS tunable VCSEL and how it would function in detail. This device uses several materials, which you may not have as much experience with. To figure out how to Fig. 1 Schematic of the piezoelectric- actuated MEMS- tunable VCSEL. (a) Side view showing the etch them, be sure to check references 2 and 3. mechanical configuration. (b) Cross- sectional Please also draw the mask set and processing view showing the optical design. (From reference sequence needed to fabricate the device. In [1]) addition to designing the mask set for the device fabrication, you should also consider additional test structure that could be included in the mask design. In addition to designing the mask set and processing sequence, address the following questions in as much detail as possible while staying within the page limit. • Which process step is the most critical and why? • How do you determine if this process step went as you expected? For example, if you think that the metal deposition is the most critical because the contact resistance must be below a certain value, you could suggest to make TLM structures to determine the contact resistance. • How do you determine (quantify) if the other (less critical) process steps went as expected? If these measurements require test structures (Verniers for example, which can be used to determine alignment offsets), be sure to explain how the test structures work. If you think • • • that including a figure will help the reader understand the test structure better, include it. The device uses a 3 µm Al oxide aperture for electrical and optical confinement. After oxidation, how do you determine if the aperture is really 3 µm? During the process, you will remove the GaAs sacrificial layer underneath the cantilever. How do you do this without etching the other parts of your device? How do you determine if all the GaAs has been removed under the cantilever? Which device characteristic will be impeded if some GaAs is not completely etched away underneath the cantilever? II ARRAYED WAVEGUIDE GRATING (AWG) AND DETECTOR With the increase in computing power comes the requirement of increased speed and transistor packing resulting a major thermal issue. Many of the advances in computers’ processing power have previously come from the increase in transistor density in single microprocessors. However, to obtain higher throughput, we now must think about how we can transfer data from processor to processor without generating too much heat. Optical interconnects, instead of traditional metals interconnects, can provide high speed, high bandwidth communication pathways between processors without generating as much heat as electrical interconnects would. Instead of using one band to transfer data, optical interconnects can use the convolution of many wavelengths each carrying different data to send signals. However, to do this, light must be multiplexed and demultiplexed so that all of the data can be transferred over a single optical fiber, or waveguide. Tanaka et al. describe arrayed waveguide grating (AWG), which they used to fabricate an optical spectrum analyzer [4]. You are to design a fabrication process to fabricate an arrayed waveguide grating (AWG) together with optical detectors. This complete device will serve as a demultiplexer and signal detector, which could be used to analyze and Fig. 2 Schematic of a proposed Arrayed Waveguide Grating detector system to be fabricated. convert optical signals into electronic signals in a fiber based network system. Arrayed Waveguide Grating (AWG) Figure 2 shows a simple schematic of the operating principle of an AWG. The AWG takes incoming light, traveling in the optical waveguide labeled 1, and directs it into a free space, labeled 2. The light then enters the AWG, labeled 3. Each waveguide is of a different length, creating different phase shifts in each fiber. At the end of the AWG lies another area of free space, labeled 4, where the light interferes constructively/destructively. This results in a spatial spread of different wavelengths of light along the output plane, where waveguides then carry out monochromatic light, labeled 5. The monochromatic light that is now carried by the exiting waveguides must be captured and returned to an electrical signal. The simplest way for this to happen is Fig. 3 Schematic of an AWG- based optical spectrum analyzer using an through detection via a p- n junction, InGaAs detector. (From reference 4) similar to a solar cell. Tanaka, Y. et al.[4] developed an optical spectrum analyzer based on arrayed waveguide grating for high- speed optical communication systems, which is shown in Fig. 3. This schematic shows an AWG integrated on a device, with a non- integrated InGaAs detector. The goal of this project is to integrate the detector into our chip, so do not design a device exactly like this one, but the reference is a good paper to read to learn about AWGs. Key Points 1) Determine a medium for use as an optical waveguide. You can start with a bare silicon wafer of any doping you would like, or you can start with a silicon on insulator wafer (SOI), which can have a buried oxide layer. 2) Think about the correct geometries based on phase shifts to determine which optical fiber along the output plane will carry which wavelength. 3) Determine a method to detect light, and to channel the light into the detector so that an electrical signal can be obtained. This device can be fabricated using processes available in the teaching cleanroom, but if any other processes are required, they MUST be available in the Nanofab, and you must provide a description of how the process can be done and where. III. FOR EITHER PROJECT YOU CHOOSE: 1. Try to use only processes that you have used or are available in the teaching clean room. If this is absolutely not possible, explain why and what equipment and process you will need. Determine if this it is available in the Nanofabrication clean room. (You may be interested to know that the e-beam evaporator in the teaching clean room can be used to deposit metals and also some insulators). 2. The mask you designs can (and should be) VERY SIMPLE: state the dimensions of the features on the mask. Discuss alignment issues, if there are any. 3. Make a flowchart of your process, clearly indicating each important process step. Schematic diagrams of what the device would look like at each critical step would also be helpful. a. Use the insights you’ve gained from the lab and class to make this process as practical as possible: i. What calibrations/experiments would you have to do (e.g. etch rates)? ii. If there are high temperature steps, state the approximate range of temperatures you expect. iii. If you are depositing a thin film, state the composition and thickness of the film. iv. Remember that these device structures will be very fragile. Indicate what steps you would take in handling the sample during the different processing steps. Think carefully about what simple processes could ruin your device (like putting a 10 nm thick membrane directly on a spinner vacuum chuck to spin photoresist) b. You do not have to go into details like spinning on resist, softbaking, exposure and development conditions – you can simply list ‘lithography’, mask 1. But you should tell me at what points you will remove the resist, when you will need to clean the wafer, where in the process you will do an inspection, what you will measure and what you will expect for that measurement. 4. Design as simple and robust a process as you can so that you can produce the finished structure. Explicitly state any important assumptions you are making. State what kinds of measurements, inspections and calibrations you would do, to ensure that your process is actually behaving the way you would want it do. References 1. M.C.Y. Huang, K.B. Cheng, Y. Zhou, A.P. Pisano, and C.J. Chang- Hasnain, “Monolithic Integrated Piezoelectric MEMS- Tunable VCSEL”, IEEE Journal of Selected Topics in Quantum Electronics, 13, 374- 380 (2007) 2. http://www.cleanroom.byu.edu/wet_etch.phtml 3. http://terpconnect.umd.edu/~browns/wetetch.html 4. Y. Tanaka, Y. Itoh, K. Aizawa, T. Kurokawa, and H. Tsuda, "Optical spectrum analyzer based on arrayed waveguide grating for high-speed optical communication systems." IEEE Photonics Technology Letters, 17, 432-434 (2005). ...
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