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# HW6_Assignment_scan - " 4~1 Design a combinational...

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Unformatted text preview: " 4~1. Design a combinational circuit that forms the 2-bit binary sum 5150 of two 2-bit numbers A1A0 and B130 and has both a carry input C0 and carry output C2. Design the entire circuit implementing each of the three outputs with a two-level circuit plus inverters for the input variables. Begin the design with the following equations for each of the two bits of the adder: St. = Xi‘g‘ici +EBiEj. +AiB—ia +AiBiCi 54. C lock and D waveforms, one latch, and two ﬂip-flops are shown in Figure 5-37. For the latch and each of the ﬂip—ﬂops, carefully sketch the output waveform, Qi, obtained in response to the input waveforms. Assume that the propagation delay of the storage elements is negligible. lnitially, all storage elements store 0. 5~6. A sequential circuit with two D flip—ﬂops A and B, two inputs X and Y, and one output Z is speciﬁed by the following input equations: DA 2 36A +XY, DB = 333 +XA, Z 2 X8 (3) Draw the logic diagram of the circuit. (b) Derive the state table. (c) Derive the state diagram. Blimp Q1 l l C o D with 1 Control ' D s Ll t l c—i T “ f1 Triggered D 03"leth J‘ Triggered D E] FIGURE 5-37 Waveforms and Storage Element for Problem 54 D C t 5—8. A sequential Circuit has one ﬂip—ﬂop Q, two inputs X and Y, and one output S. The Circuit consists of a D ﬂip-flop with S as its output and logic implementing the function D:X®Y€BS with D as the input to the D ﬂip—ﬂop. Derive the state table and state diagram of the sequential Circuit. 5—9. Starting from state 00 in the state diagram of Figure 5—17(a), determine the state transitions and output sequence that will be generated when an input sequence of 10011011110 is applied. 5—10. Draw the state diagram of the sequential circuit speciﬁed by the state table in Table 5—15‘ El TABLE 5-15 State Table for Circuit of Problem 5-10 Present State Inputs Next State Output A B X Y A B 2 “WW 0 0 0 0 0 0 0 0 0 O 1 0 1 0 0 0 1 0 1 0 1 0 0 1 1 1 1 1 0 1 0 0 0 1 ‘1 0 1 0 1 1 t) 1 O 1 1 0 1 O 0 0 1 l 1 0 0 0 l, 0 0 0 1 l 1 1 0 t) l 1 ‘1 0 1 0 1 0 1 1 1 1 O 1 1 1 0 0 1 1 0 0 0 O 0 1, 1 0 1 0 0 1 1 1 1 O 0 O 0 1 1 1 1. O 1 1 ...
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