EE 121b - HW 4

EE 121b - HW 4 - iii) The threshold voltage b) Repeat a) if...

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EE 121B / Winter 2009 / Prof. Chui Homework #04, p.1 EE 121B Principles of Semiconductor Device Design Winter 2009 Homework #04 (Due Date: Feb 27 th , 2009, 12 pm in Boelter 6731) Apply the same set of physical constants as in Homework #01 and the following general assumptions: I. Temperature = 300 K Semiconductor = Silicon a. Intrinsic carrier concentration 1 × 10 10 cm -3 b. Permittivity = 11.8 c. Electron affinity = 4.0 eV d. Energy bandgap = 1.12 eV Insulator = Silicon dioxide a. Permittivity = 3.9 Questions: 1) For an MOS capacitor with a p + silicon gate electrode, an n -type silicon substrate doping of 10 16 cm -3 , and gate insulator thickness of 30 nm, a) Calculate i) The capacitance per unit area at flat band, ii) The capacitance per unit area at minimum, and
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Unformatted text preview: iii) The threshold voltage b) Repeat a) if the p + silicon gate electrode is replace with n + silicon; Identify and comment on any difference(s) observed 2) For the same capacitor described in 1)-a) with a positive oxide trapped charge density of 10 12 cm-2 located at the oxide/substrate interface, a) Calculate the threshold voltage b) Sketch as a function of position across the MOS structure at strong inversion: i) The electric field, and ii) The potential c) Sketch the low-frequency capacitance-voltage characteristics from accumulation to inversion with and without the oxide trapped charges d) Repeat c) on the same graph if the oxide trapped charges are negative instead of positive...
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This note was uploaded on 01/17/2012 for the course EE EE 110 taught by Professor Gupta during the Spring '09 term at UCLA.

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