hw3sol

# hw3sol - not support ‘U’ Q3. In VHDL – bit_vector ,...

This preview shows page 1. Sign up to view the full content.

C – 302 Solutions to Homework Weeks 3 Q1. (i) constant e:real:=2.732; (ii) type small_integer is integer range 5 to 10; type int_array is array(0 to 5) of small_integer; variable x:int_array; (iii) subtype working_day is day_of_week range mon to fri; variable today:working_day; (iv) signal x:bit_vector(1 to 10):= (1 => ‘1’, 7 => ‘1’, others =>’0’); (v) type RESISTANCE is range 1 to 5E6 units OHM; KILO_OHM=1000 OHM; MEGA_OHM=1000 KILO_OHM; end units; (vi) variable message:string(1 to 12):=”GOOD MORNING”; Q2. constant K:real:=8.14230E9 -- K is too large for integer constant pi:real:=3.14159; -- only 6 significant digits accuracy variable done:bit:=’0’; -- quotes were missing signal data_bus:std_logic_vector(0 to 7):=”UUUUUUU”; -- bit type does
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: not support ‘U’ Q3. In VHDL – bit_vector , string In IEEE - std_logic_vector Q 4,5 Please refer to the file hw3solQ4Q5.pdf Q6. Let t = a xnor b Then (a xnor b) nand c = t nand c = not t or not c (by DeMorgans Law) = (a xor b) or not c (since not xnor is xor) =(( a and not b) or (not a and b)) or not c Q7. True (since ‘0’<’1’) True (since true>false) False (since “batch” is longer) True (since sun>mon) Q8. (i) “101011” sra 3 = “111101” (ii) “01110110” rol -2 = “01110110” ror 2 =”10011101” (iii) (f,t,t,t) sll 2 = (t,t,f,f) (iv) -23 = (5)(-4) +(-3) = (5)(-5) + (+2) Hence -23 mod 5 = +2 (v) -41 =(-7)(6) + (+1) = (-7)(%) + (-6) Hence -41 rem -7 = -6...
View Full Document

## This note was uploaded on 01/17/2012 for the course ECEC 302 taught by Professor Karkalprabhu during the Spring '06 term at Drexel.

Ask a homework question - tutors are online