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Topic 9 - ALU Control_1

Topic 9 - ALU Control_1 - Computer Architecture ASimple...

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Computer  Architecture A Simple  Implementation  Scheme Reading:  Sections 4.4
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A Glance at the Schedule Change in schedule Today – Exam review/Single cycle datapath Tomorrow – Single-cycle control Wednesday – Multicycle Thursday – In-class group time Friday – Comp time for night exam Milestones Start working on the milestones. Feel free to go  ahead and work on the other milestones if you  are finished with M1.
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Outline  Exam review Review of single-cycle datapath Control
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"Only two things are infinite, the universe and  human stupidity, and I'm not sure about the  former." - Albert Einstein (1879-1955) 
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R-Type/Load/Store Datapath
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Branch Instructions
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Control
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The Main Control Unit 0 rs rt rd shamt funct 31:26 5:0 25:21 20:16 15:11 10:6 35 or 43 rs rt address 31:26 25:21 20:16 15:0 4 rs rt address 31:26 25:21 20:16 15:0 R-type Load/ Store Branch opcode always  read read,  except  for load write for  R-type  and load sign-extend  and add
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Datapath With Control
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R-Type Instruction
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Load Instruction
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Branch-on-Equal Instruction
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