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EE2731_Lab1report

# EE2731_Lab1report - Heath J LeBlanc Mariel Losso EE 2731...

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Heath J LeBlanc Mariel Losso 9/20/05 EE 2731 Section 3, Group 5 Experiment 1 - Combinational Logic Circuits

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Dual 2-Bit Comparator Circuit Part A: Design and build a combinational logic circuit with 4 inputs and 3 outputs that compares two 2-bit numbers, labeled X 1 , X 0 , and Y 1 , Y 0 . The outputs are labeled X>Y, X=Y, and X<Y. Use AND, OR, and NOT gates. Digital Inputs: Data Inputs: X 1 , X 0 , Y 1 , and Y 0 from switches Select Lines: None. Clock: None. Digital Output: X>Y, X=Y, and X<Y Truth Table: X 1 X 0 Y 1 Y 0 X > Y X = Y X < Y 0 0 0 0 0 1 0 0 0 0 1 0 0 1 0 0 1 0 0 0 1 0 0 1 1 0 0 1 0 1 0 0 1 0 0 0 1 0 1 0 1 0 0 1 1 0 0 0 1 0 1 1 1 0 0 1 1 0 0 0 1 0 0 1 0 0 1 1 0 0 1 0 1 0 0 1 0 1 0 1 1 0 0 1 1 1 0 0 1 0 0 1 1 0 1 1 0 0 1 1 1 0 1 0 0 1 1 1 1 0 1 0
Karnaugh Maps: X 1 X 0 Y 1 Y 0 00 01 11 10 00 0 1 1 1 01 0 0 1 1 11 0 0 0 0 10 0 0 1 0 Map for X>Y X 1 X 0 Y 1 Y 0 00 01 11 10 00 1 0 0 0 01 0 1 0 0 11 0 0 1 0 10 0 0 0 1 Map for X=Y X 1 X 0 Y 1 Y 0 00 01 11 10 00 0 0 0 0 01 1 0 0 0 11 1 1 0 1 10 1 1 0 0 Map for X<Y Equations: (X>Y) = X 0 X 1 Y 0 ’Y 1 + X 0 Y 0 ’Y 1 ’ + X 1 Y 1 (X=Y) = X 0 X 1 ’Y 0 ’Y 1 ’ + X 0 X 1 ’Y 0 Y 1 ’ + X 0 X 1 Y 0 Y 1 + X 0 ’X 1 Y 0 ’Y 1 (X<Y) = X 1 ’Y 1 + X 0 ’X 1 ’Y 0 + X 0 ’Y 0 Y 1

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