lab report 5

lab report 5 - Jonathan Bollinger Randall Robert Experiment...

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Jonathan Bollinger Randall Robert Experiment 5 - Counters Part A: Design and build a synchronous decade counter using two 74LS76 and one 74LS08 ICs. Digital Inputs: Data Inputs: None Select Lines: None Clock (debounce switch or digital clock) Digital Outputs: Q3, Q2, Q1, Q0 Q0 - LSB Q3 - MSB Truth Table: (don't cares denoted with a "d") Current State(Q) Next State(Q*) Inputs:(JK) 3, 2, 1, 0 3, 2, 1, 0 3, 2, 1, 0 0 0 0 0 0 0 0 1 0d 0d 0d 1d 0 0 0 1 0 0 1 0 0d 0d 1d d1 0 0 1 0 0 0 1 1 0d 0d d0 1d 0 0 1 1 0 1 0 0 0d 1d d1 d1 0 1 0 0 0 1 0 1 0d d0 0d 1d 0 1 0 1 0 1 1 0 0d d0 1d d1 0 1 1 0 0 1 1 1 0d d0 d0 1d 0 1 1 1 1 0 0 0 1d d1 d1 d1 1 0 0 0 1 0 0 1 d0 0d 0d 1d 1 0 0 1 0 0 0 0 d1 0d 0d d1 Kaurnaugh Maps: Q1Q0 \ Q3Q2 J3 00 01 11 10 00 0 0 X D 01 0 0 X D 11 0 1 X X 10 0 0 X X Q1Q0 \ Q3Q2 K3 00 01 11 10 00 D D X 0 01 D D X 1 11 D D X X 10 D D X X Q1Q0 \ Q3Q2 J2 00 01 11 10 00 0 D X 0 01 0 D X 0 11 1 D X X 10 0 D X X Q1Q0 \ Q3Q2 K2 00 01 11 10 00 D 0 X D
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01 D 0 X D 11 D 1 X X 10 D 0 X X Q1Q0 \ Q3Q2 J1 00 01 11 10 00 0 0 D 0 01 1 1 D 0 11 D D D D
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lab report 5 - Jonathan Bollinger Randall Robert Experiment...

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