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physicsberklyee240

# physicsberklyee240 - UNIVERSITY OF CALIFORNIA College of...

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1 UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences E. Alon Homework #1 Solutions EECS 240 P. Nuzzo Use the EECS240 90nm CMOS process in all homeworks and projects unless otherwise noted. The SPICE model and instructions for running the simulator are available on the course website. 1. As a brief review of some of the basic analysis you learned in EE140, in this problem we will analyze the simple amplifier circuit shown below. You can assume that the small signal output resistance (r o ) of the transistor is infinite, and that the only parasitic capacitance associated with the transistor is its C gs . a. Draw the small signal model of this circuit. Solution: b. As a function of the transistor’s g m and the resistor values R s and R L , what is the DC small signal gain (V o /V i ) of the amplifier? Solution: There are obviously an infinite number of methods you can use to solve this problem. For instance, you could look at the circuit as a series-shunt feedback system and apply your favorite feedback analysis method. Here we’ll solve the problem based on KCL and KVL, but any other correct approach will receive full credit.

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2 First of all, we observe that at DC ( s 0 ) the capacitor behaves as an open circuit (infinite impedance), no current flows through R S , and the gate node voltage v G is set to v i . On the other side, the source node voltage is just the output voltage v o . So, we can immediately write: ( ) , o i L m gs L m o v v R g v R g v = = which leads to . 1 1 0 L m L L m L m i o R g R R g R g v v A + = + = = As expected from a common drain (source follower) configuration, the gain is essentially 1 when g m R L >> 1. Another way of looking at this is that we just have a resistive divider between R L and 1/ g m since 1/ g m is the resistance seen looking into the transistor’s source terminal. c. What is the gain of the amplifier at very high frequencies? Solution: At very high frequencies ( s →∞ ) the capacitor behaves as a short-circuit (zero impedance), and therefore the v gs across the transistor is 0. The circuit then simplifies to a pure resistive divider: . L S L i o R R R v v A + = = d. Sketch the magnitude of the transfer function of this amplifier vs. frequency and label the location of the amplifier’s poles and zeros (as a function of R s , R L , g m , and C gs ). There is only one reactive element in the circuit, which generates one pole, and in this case, one zero in the transfer function, leading to the following general form: p z s s s s A s H + + = 1 1 ) ( 0 , (1) Note that if know the gain of the circuit at DC (i.e., zero) and infinite (i.e., very high) frequencies, we can use that to deduce information about the relationship between the pole and zero locations: z p s s A A 0 = . (2) where A is the gain at infinite frequency
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