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EE20-2007-10-11-Midterm-02 - EECS 20N Structure and...

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EECS 20N: Structure and Interpretation of Signals and Systems Department of Electrical Engineering and Computer Sciences U NIVERSITY OF C ALIFORNIA B ERKELEY MIDTERM 2 11 October 2007 LAST Name FIRST Name Lab Time (10 Points) Print your name and lab time in legible, block lettering above AND on the last page where the grading table appears. This exam should take up to 70 minutes to complete. You will be given at least 70 minutes, up to a maximum of 80 minutes, to work on the exam. This exam is closed book. Collaboration is not permitted. You may not use or access, or cause to be used or accessed, any reference in print or electronic form at any time during the exam, except two double-sided 8 . 5” × 11” sheets of handwritten notes having no appendage. Computing, communication, and other electronic devices (except dedicated timekeepers) must be turned off. Noncompliance with these or other instructions from the teaching staff— including, for example, commencing work prematurely or continuing beyond the announced stop time —is a serious violation of the Code of Student Conduct. Scratch paper will be provided to you; ask for more if you run out. You may not use your own scratch paper. The exam printout consists of pages numbered 1 through 10. When you are prompted by the teaching staff to begin work, verify that your copy of the exam is free of printing anomalies and contains all of the ten numbered pages. If you find a defect in your copy, notify the staff immediately. Please write neatly and legibly, because if we can’t read it, we can’t grade it. For each problem, limit your work to the space provided specifically for that problem. No other work will be considered in grading your exam. No exceptions. Unless explicitly waived by the specific wording of a problem, you must ex- plain your responses (and reasoning) succinctly, but clearly and convincingly. We hope you do a fantastic job on this exam. 1
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MT2.1 (40 Points) The block diagram below shows an architecture for implement- ing an amplitude modulator using signal adders and square-law devices ( SLD s).
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