M16_2_EEM16_F08_L15

M16_2_EEM16_F08_L15 - EEM16/CSM51A:...

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EEM16/CSM51A: Logic Design of Digital Systems Lecture #15 Ch 10: Arithmetic combinational modules and networks Prof. Danijela Cabric Fall 2008
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Announcements ± HW#6 : Due Nov. 25in class ± Make up lecture on Friday Nov. 21, 2:00 4:00 PM ± Place WGYOUNG CS24 ± Lecture will be recorded and posted on Eeweb ± Quiz 2
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Quiz ± Consider a new kind of flip flop, called the RK flip flop, which behaves as follows. ± When R=K=0, the flip flop is reset. ± When R=K=1, the flip flop is set. ± When R=0 and K=1, the flip flop holds its current state. ± When R=1 and K=0, the flip flop complements its current state (0 becomes 1, 1 becomes 0). ± Implement RK flip flop using only T flip flops and NAND gates 3
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Agenda ± Specification of adder modules for positive integers ± Half adder and full adder modules ± Carry ripple and carry lookahead adder modules ± Networks of adder modules ± Representation of signed integers: ± 1. sign and magnitude ± 2. two's complement ± 3. ones' complement 4
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Digital System Architecture: Ex. Computer
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M16_2_EEM16_F08_L15 - EEM16/CSM51A:...

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