M16_2_EEM16_F08_L17

M16_2_EEM16_F08_L17 - EEM16/CSM51A:...

Info iconThis preview shows pages 1–38. Sign up to view the full content.

View Full Document Right Arrow Icon
EEM16/CSM51A: Logic Design of Digital Systems Lecture #17 Ch 11: Standard Sequential Modules Prof. Danijela Cabric Fall 2008
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Announcements ± HW#7 : Due Dec. 4 in class ± Practice problems from Ch. 8 and Ch. 9 posted on Eeweb (including solution) 2
Background image of page 2
Agenda ± Registers ± Shift registers ± Synchronous counters ± For each module: ± Its specification ± An implementation with flip flops and gates ± Its basic uses ± Composing smaller modules into larger ones 3
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Registers 4
Background image of page 4
Implementation of 4 bit Register 5
Background image of page 5

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Timing Behavior 6
Background image of page 6
Example Use of Registers 7
Background image of page 7

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Implementation using Register 8
Background image of page 8
Shift Registers 9
Background image of page 9

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Shift Register Control 10
Background image of page 10
Types of Unidirectional Shift Registers 11
Background image of page 11

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Bidirectional Shift register 12
Background image of page 12
Use of Shift Registers 13 Serial Interconnection of Systems
Background image of page 13

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Uses of Shift Registers: Bit serial Operations, e.g. Addition 14
Background image of page 14
Uses of Shift Registers: As State Register for Finite Memory Systems 15 Example:
Background image of page 15

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Another Example of Shift Register as State Register 16
Background image of page 16
Network of Serial in/Serial out Shift Registers 17
Background image of page 17

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Counters
Background image of page 18
Background image of page 19

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Background image of page 20
Background image of page 21

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Background image of page 22
Background image of page 23

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Background image of page 24
Background image of page 25

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Background image of page 26
Background image of page 27

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Background image of page 28