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Unformatted text preview: are the most significant bits of the two arguments, and X0 and Y0 are the least significant bits. The output is a bit vector Z with enough bits to represent all possible values that the sum of X and Y can take. b. Enter your circuit as a schematic in Xilinx ISE using gates from the set {NOT, AND, OR, NAND, NOR}. Submit a printout of the schematic that you draw in Xilinx ISE. c. Show that you circuit works correctly by simulating it in Xilinx ISE for all possible input values of X and Y. Arrange for the inputs to change at time instants that are multiples of 100 ns. Print out the results of simulation produced by the tool to demonstrate that you indeed were able to simulate successfully....
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This note was uploaded on 01/24/2012 for the course EE M16 taught by Professor Cabric during the Fall '08 term at UCLA.
 Fall '08
 CABRIC
 Electrical Engineering

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