M16_2_Fall2008_Discussion_4 - EEM16Fall2008DISCUSSION#3...

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EEM16 – Fall 2008 - DISCUSSION #3 Problem 1: Exercise 4.3 Problem 2: Exercise 4.10 Problem 3: Output load and delay of network Look at the figure for exercise 4.15 in book. Consider the module at top right corner of the complex gate network. For this module, find a) output load for each gate b) delay of the network Problem 4: Exercise 5.2 Problem 5: Two-level combinational logic minimization a) Consider the function F(a, b, c) = a c + ac + a b. Draw its K-map, an using it determine which of the following terms are implicants (but not necessarily prime implicants) of F: a b
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This note was uploaded on 01/24/2012 for the course EE M16 taught by Professor Cabric during the Fall '08 term at UCLA.

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