74ls240

74ls240 - Revised March 2000 DM74LS240 • DM74LS241 Octal...

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Unformatted text preview: Revised March 2000 DM74LS240 • DM74LS241 Octal 3-STATE Buffer/Line Driver/Line Receiver General Description Features These buffers/line drivers are designed to improve both the performance and PC board density of 3-STATE buffers/ drivers employed as memory-address drivers, clock drivers, and bus-oriented transmitters/receivers. Featuring 400 mV of hysteresis at each low current PNP data line input, they provide improved noise rejection and high fanout outputs and can be used to drive terminated lines down to 133Ω. s 3-STATE outputs drive bus lines directly s PNP inputs reduce DC loading on bus lines s Hysteresis at data inputs improves noise margins s Typical IOL (sink current) 24 mA s Typical IOH (source current) −15 mA s Typical propagation delay times Inverting Noninverting 10.5 ns 12 ns s Typical enable/disable time 18 ns s Typical power dissipation (enabled) Inverting Noninverting 130 mW 135 mW Ordering Code: Order Number Package Number Package Description DM74LS240WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74LS240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74LS240N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide DM74LS241WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74LS241N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams DM74LS240 © 2000 Fairchild Semiconductor Corporation DM74LS241 DS006411 www.fairchildsemi.com DM74LS240 • DM74LS241 Octal 3-STATE Buffer/Line Driver/Line Receiver August 1986 DM74LS240 • DM74LS241 Function Tables DM74LS240 Inputs DM74LS241 Output Inputs Outputs G A Y G G 1A 2A 1Y L L H X L L X L L H L X L H X H H X Z X H X X Z H X X L L H X X H H L X X X Z L = LOW Logic Level H = HIGH Logic Level X = Either LOW or HIGH Logic Level Z = High Impedance www.fairchildsemi.com 2 2Y Supply Voltage Input Voltage 7V 0°C to +70°C Operating Free Air Temperature Range Storage Temperature Range Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. 7V −65°C to +150°C Recommended Operating Conditions Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Note 2: All typicals are at VCC = 5V, TA = 25°C. Note 3: N ot more than one output should be shorted at a time, and the duration should not exceed one second. 3 www.fairchildsemi.com DM74LS240 • DM74LS241 Absolute Maximum Ratings(Note 1) DM74LS240 • DM74LS241 Switching Characteristics at VCC = 5V and TA = 25°C Symbol Parameter Conditions Max DM74LS240 18 RL = 667Ω DM74LS241 18 Output Enable Time CL = 45 pF DM74LS240 30 RL = 667Ω DM74LS241 30 Output Enable Time CL = 45 pF DM74LS240 23 RL = 667Ω DM74LS241 23 Output Disable Time CL = 5 pF DM74LS240 25 RL = 667Ω DM74LS241 25 Output Disable Time CL = 5 pF DM74LS240 18 RL = 667Ω DM74LS241 18 Propagation Delay Time CL = 150 pF DM74LS240 18 RL = 667Ω DM74LS241 21 Propagation Delay Time CL = 150 pF DM74LS240 22 RL = 667Ω DM74LS241 22 Output Enable Time CL = 150 pF DM74LS240 33 RL = 667Ω DM74LS241 33 Output Enable Time CL = 150 pF DM74LS240 26 to HIGH Level tPZH CL = 45 pF to LOW Level tPZL Propagation Delay Time HIGH-to-LOW Level Output tPHL 18 LOW-to-HIGH Level Output tPLH DM74LS241 from HIGH Level tPHZ RL = 667Ω from LOW Level tPLZ 14 to HIGH Level tPZH DM74LS240 to LOW Level tPZL CL = 45 pF HIGH-to-LOW Level Output tPHL Propagation Delay Time LOW-to-HIGH Level Output tPLH RL = 667Ω DM74LS241 26 www.fairchildsemi.com 4 Units ns ns ns ns ns ns ns ns ns ns DM74LS240 • DM74LS241 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 5 www.fairchildsemi.com DM74LS240 • DM74LS241 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Description M20D www.fairchildsemi.com 6 DM74LS240 • DM74LS241 Octal 3-STATE Buffer/Line Driver/Line Receiver Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 7 www.fairchildsemi.com ...
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