LMARFC05

LMARFC05 - 145 CHAPTER 1 Topical Cross-reference for Coprocessor Instructions.146 Interpreting Coprocessor Instructions.148 Syntax 148 Examples 148

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Unformatted text preview: 145 CHAPTER 1 Topical Cross-reference for Coprocessor Instructions........................................146 Interpreting Coprocessor Instructions..................................................................148 Syntax 148 Examples 148 Clock Speeds148 Instruction Size 148 Architecture...........................................................................................................149 Topical Cross-reference for Coprocessor Instructions Arithmetic FABS FADD/FIADD FADDP FCHS FDIV/FIDIV FDIVP FDIVR/FIDIVR FDIVRP FMUL/FIMUL FMULP FPREM FPREM1 § FRNDINT FSCALE FSQRT Coprocessor Filename: 0324af58afc677b24f1de0a6ff3815befa55f079.DOC Project: Template: Author: Last Saved By: Revision #: 0 Page: 145 of 44 Printed: 11/04/92 14:29 A11/P11 FSUB/FISUB FSUBP FSUBR/FISUBR FSUBRP FXTRACT Compare FCOM/FICOM FCOMP/FICOMP FCOMPP FSTSW/FNSTSW FTST FUCOM § FUCOMP § FUCOMPP § FXAM Load FLD/FILD/FBLD FLDCW FLDENV FRSTOR FXCH Load Constant FLD1 FLDL2E FLDL2T FLDLG2 FLDLN2 FLDPI Filename: 0324af58afc677b24f1de0a6ff3815befa55f079.DOC Project: Template: Author: Last Saved By: Revision #: 0 Page: 146 of 44 Printed: 11/04/92 14:29 A11/P11 Coprocessor 147 FLDZ Processor Control FCLEX/FNCLEX FDECSTP FDISI/FNDISI* FENI/FNENI* FFREE FINCSTP FINIT/FNINIT FLDCW FNOP FRSTOR FSAVE/FNSAVE FSETPM _ FSTCW/FNSTCW FSTENV/FNSTENV FSTSW/FNSTSW FWAIT Store Data FSAVE/FNSAVE FST/FIST FSTCW/FNSTCW FSTENV/FNSTENV FSTP/FISTP/FBSTP FSTSW/FNSTSW Filename: 0324af58afc677b24f1de0a6ff3815befa55f079.DOC Project: Template: Author: Last Saved By: Revision #: 0 Page: 147 of 44 Printed: 11/04/92 14:29 A11/P11 Transcendental F2XM1 FCOS § FPATAN FPREM FPREM1 § FPTAN FSIN § FSINCOS § FYL2P1 FYL2X * 8087 only † 80287 only. § 80387–80486 only. Interpreting Coprocessor Instructions This section provides an alphabetical reference to instructions of the 8087, 80287, and 80387 coprocessors. The format is the same as the processor instructions except that encodings are not provided. Differences are noted in the following. The 80486 has the coprocessor built in. This one chip executes all the instructions listed in the previous section and this section. Syntax Syntaxes in Column 1 use the following abbreviations for operand types: Syntax Operand reg A coprocessor stack register memreal A direct or indirect memory operand storing a real number Filename: 0324af58afc677b24f1de0a6ff3815befa55f079.DOC Project: Template: Author: Last Saved By: Revision #: 0 Page: 148 of 44 Printed: 11/04/92 14:29 A11/P11 Coprocessor 149 memint A direct or indirect memory operand storing a binary integer membcd A direct or indirect memory operand storing a BCD number Examples The position of the examples in Column 2 is not related to the clock speeds in Column 3....
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This note was uploaded on 01/24/2012 for the course EE 3751 taught by Professor Desouza during the Spring '04 term at LSU.

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LMARFC05 - 145 CHAPTER 1 Topical Cross-reference for Coprocessor Instructions.146 Interpreting Coprocessor Instructions.148 Syntax 148 Examples 148

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