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test #1 Fall 2001

# test #1 Fall 2001 - Name EE3220 Test#1 Summer2001 SSN 1 (...

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Name:_________________________________________ EE 3220 Test #  1 Summer 2001 SSN:__________________________________________  DO NOT WRITE ON THE BACK OF THESE PAGES. 1.) Perform the DC bias analysis for the circuit below.  (Find all node voltages and  currents).  What is the power absorbed by the transistor? 2.) For the BJT current source below, find:  Io, rn, Power in Q3.  Given ro3 = 10 4  ,  and  β  = 100

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3.) For the circuit below, what is the largest voltage that will still have the transistor  operating in the constant current region?  Draw the transfer characteristic (v o /v s for the circuit. 4.) Use the small signal model to compute the input and output impedance for the  circuit below.
5.) Compute the power delivered to the load for this cascaded amplifier network.  How could the power delivered be improved further?

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6.) Choose a value for R C  and R E  that will bias V C  close to 0 volts and have a small  signal gain of at least 3.
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test #1 Fall 2001 - Name EE3220 Test#1 Summer2001 SSN 1 (...

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