test #1

test #1 - = 50k , and r out = 30 . How much does the power...

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Name:_________________________________________ EE 3220 Test # 1 Fall 2000 SSN:__________________________________________ DO NOT WRITE ON THE BACK OF THESE PAGES. 1.) Perform the DC bias analysis for the circuit below. (Find all node voltages and currents). What is the power absorbed by the FET? 2.) Choose a value for R C and R E that will bias V C close to 0 Volts and have a gain of at least 3. V CC = +10 Volts V EE = -10 Volts R 1 = 50 k R 2 = 10 k β = large
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3.) Compute the power delivered to the load for the following circuit model. Then insert a unity gain amplifier with r in
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Unformatted text preview: = 50k , and r out = 30 . How much does the power delivered to the load increase? 4.) Draw the small signal model for the circuit below and derive the gain v o /v s . 5.) Explain the reason why we design BJT inverters with feedback resistors (R E ). 6.) What is the negative of using this resistor? 7.) What is one solution to this negative that requires the addition of only a single component? What does this component do, and explain how it benefits. 8.) Explain why are FET's not ideal for use as inverting amplifiers?...
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test #1 - = 50k , and r out = 30 . How much does the power...

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