HW3 - word is reserved for a “sign-bit”(0 is positive 1...

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Physics 434 Fall 2010 1 Homework for Module 2 - Digital I/O Due Thursday, October 21. You should do this homework before the Module 2 lab since you’ll need to figure out these problems in order to code the Module2 VI. Problem 1: Exit state Make a front panel with two simple on-or-off LEDs. Make the VI alternately light one LED for 1 second, then the other for 1 second; that should be straightforward. Now figure out a way for the VI to extinguish both LEDs on leaving the VI. Problem 2: Light a 7-segment display Make a front panel that simulates the 7 segments of a 7-segment LED display; simple LEDs are fine. Make a VI that accepts a decimal number from 0 to 9 and lights the LEDs appropriately. Have a “test” front-panel setting that cycles through all the digits. Problem 3: Negative-integer representation: signed integer and 2s-complement Typically, the output of an ADC is a “signed integer” where the most-significant-bit of a
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Unformatted text preview: word is reserved for a “sign-bit” (0 is positive, 1 is negative) and the rest of the word is the magnitude of the output. Hence, the output -8 V and + 8 V differ only in the sign bit. But this is not the negative-integer convention for most computers. Most computers use “2s-complement” representation of negative integers. Forming a negative integer from a positive integer requires two steps: first, all bits in the positive integer are complemented (1’s become 0’s and 0’s become 1’s), then binary 1 is added. For instance, to get -1, start with +1 (all 0s except the lowest order bit is 1), then add binary 1. The result is all 1’s. Similarly the -2 is all 1s except the lowest-order bit of 0. Code a VI that accepts a 1-byte signed-integer number between -127 and 128 and displays the resulting bit pattern for the 2s-complement 1-byte integer....
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