Lecture 5 - CNIT 17600 IT Architectures Functional Components of a Simple Computer Readings Computer Organization Architecture Chapter 4 NOT 4.10

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CNIT 17600 IT Architectures Functional Components of a Simple Computer
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Readings Chapter 4 NOT 4.10, 4.12, 4.14 Computer Organization & Architecture
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Objectives 3 Learn the components common to every modern computer system. Be able to explain how each component contributes to program execution. Understand a simple architecture invented to illuminate these basic concepts, and how it relates to some real architectures. Know how the program assembly process works.
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4.1 Introduction 4 Lecture1 presented a general overview of computer systems In Lecture 2, we discussed how data is stored and manipulated by various computer system components. Lecture 3 described the fundamental components of digital circuits. Having this background, we can now understand how computer components work, and how they fit together to create useful computer systems
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4.2 CPU Basics 5 The computer’s CPU fetches, decodes, and executes program instructions . The two principal parts of the CPU are the datapath and the control unit . The datapath consists of an arithmetic-logic unit and storage units (registers) that are interconnected by a data bus that is also connected to main memory. Various CPU components perform sequenced operations according to signals provided by its control unit.
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4.2 CPU Basics 6 Registers hold data that can be readily accessed by the CPU They can be implemented using D flip-flops A 32-bit register requires 32 D flip-flops The arithmetic-logic unit (ALU) carries out logical and arithmetic operations as directed by the control unit The control unit determines which actions to carry out according to the values in a program counter register and a status register
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7 The CPU shares data with other system components by way of a data bus. A bus is a set of wires that simultaneously convey a single bit along each line. Two types of buses are commonly found in computer systems: point-to-point , and multipoint buses. 4.3 The Bus These are point-to-point buses:
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4.3 The Bus 8 Buses consist of data lines, control lines, and address lines Data lines convey bits from one device to another Control lines determine the direction of data flow, and when each device can access the bus Address lines determine the location of the source or destination of the data
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4.3 The Bus 9
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The Bus A Sample Bus System Control Bus Encoder/Decoder Address Bus Encoder/Decoder Data Bus Bus Connected Device
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11 A multipoint bus is shown below Multipoint buses are a shared resource Access is controlled through protocols Usually these protocols are built into the hardware 4.3 The Bus
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4.3 The Bus 12 In a master-slave configuration, where more than one device can be the bus master, concurrent bus master requests must be arbitrated Four categories of bus arbitration are: Daisy chain : Permissions are passed from the highest-priority device to the lowest Centralized parallel
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This note was uploaded on 01/30/2012 for the course CNIT 176 taught by Professor Hansen during the Fall '09 term at Purdue University-West Lafayette.

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Lecture 5 - CNIT 17600 IT Architectures Functional Components of a Simple Computer Readings Computer Organization Architecture Chapter 4 NOT 4.10

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