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EE 330 Exam 1 Spring 2011

EE 330 Exam 1 Spring 2011 - EE 330 Exam 1 Spring 2011 Name...

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Page 1 of 9 EE 330 Name_ _ _ _ _ _ _ _ _ _ _ _ _ _ Exam 1 Spring 2011 Instructions: Students may bring 1 page of notes (front and back) to this exam. There are 8 questions and 6 problems. The points allocated to each question and each problem are as indicated. Please solve problems in the space provided on this exam and attach extra sheets only if you run out of space in solving a specific problem. If reference to a semiconductor processes is needed beyond what is given in a specific problem or question, assume a CMOS process is available with the following key process parameters; n C OX =100 A/v 2  p C OX = n C OX /3 ,V TNO =0.5V, V TPO = - 0.5V, C OX =2fF/ 2 , = 0, and    If reference to a diode is made, assume the process parameter J S =10 -17 A/ 2 . If any other process parameters for MOS devices are needed, use the process parameters associated with the process described on the attachment to this exam. Specify clearly what process parameters you are using in any solution requiring process parameters. 1. (2pts) What is the minimum gate length in a state of the art CMOS process such as those used by Intel in making current generation microprocessors? 2. (2pts) The pn junction was reported in the early 40 s but it was several years later until the operation was well understood and a model of the IV characteristics was developed. Who developed the model of the pn junction?
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