EE 330 Lect 10 Spring 2011

EE 330 Lect 10 Spring 2011 - EE 330 Lecture 10 IC...

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EE 330 Lecture 10 IC Fabrication Technology Part III - Interconnects - Back-end Processes
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Quiz 9 What is the major reason shallow trench isolation (STI) is used instead of Local Oxidation to create the field oxide in a MOS process? Shallow Trench Isolation (STI) p - Silicon Pad Oxide Silicon Nitride Etched Shallow Trench
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And the number is …. 6 3 1 2 4 5 7 8 9
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And the number is …. 6 3 1 2 4 5 7 8 9 4
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Quiz 9 What is the major reason shallow trench isolation (STI) is used instead of Local Oxidation to create the field oxide in a MOS process? Solution: STI helps keep the surface of the wafer planar
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IC Fabrication Technology Crystal Preparation Masking Photolithographic Process Deposition Implantation Etching Diffusion Oxidation Epitaxy Polysilicon Contacts, Interconnect and Metalization Planarization Review from Last Time
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Etching Selective Removal of Unwanted Materials • Wet Etch – Inexpensive but under-cutting a problem • Dry Etch – Often termed ion etch or plasma etch Review from Last Time
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Diffusion Controlled Migration of Impurities Time and Temperature Dependent Both vertical and lateral diffusion occurs Crystal orientation affects diffusion rates in lateral and vertical dimensions Materials Dependent Subsequent Movement Electrical Properties Highly Dependent upon Number and Distribution of Impurities Diffusion at 800 o C to 1200 o C Source of Impurities Deposition Ion Implantation Only a few A
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EE 330 Lect 10 Spring 2011 - EE 330 Lecture 10 IC...

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