EE 330 Lect 11 Fall 2011

EE 330 Lect 11 Fall 2011 - EE 330 Lecture 11 IC Fabrication...

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EE 330 Lecture 11 IC Fabrication Technology Part IV - Back-end Processes Devices in Semiconductor Processes
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• Contacts usually of a fixed size – All etches reach bottom at about the same time – Multiple contacts widely used – Contacts not allowed to Poly on thin oxide in most processes – Dog-bone often needed for minimum-length devices Review from Last Time
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Metalization • Aluminum widely used for interconnect • Copper finding some applications • Must not exceed maximum current density – around 1ma/u • Ohmic Drop must be managed • Parasitic Capacitances must be managed • Interconnects from high to low level metals require connections to each level of metal • Stacked vias permissible in some processes Review from Last Time
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Metalization Interconnect Layers May Vary in Thickness or Be Mostly Uniform 12.5μ
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Interconnects • Metal is preferred interconnect – Because conductivity is high • Parasitic capacitances and resistances of concern in all interconnects • Polysilicon used for short interconnects – Silicided to reduce resistance – Unsilicided when used as resistors • Diffusion used for short interconnects – Parasitic capacitances are high Review from Last Time
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Interconnects • Metal is preferred interconnect – Because conductivity is high • Parasitic capacitances and resistances of concern in all interconnects • Polysilicon used for short interconnects – Silicided to reduce resistance – Unsilicided when used as resistors • Diffusion used for short interconnects – Parasitic capacitances are high Review from Last Time
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Resistance in Interconnects R=R [L / W] L W The “Number of Squares” approach to resistance determination in thin films 1 2 3 21 N S = 21 L / W=21 R=R N S Review from Last Time
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Capacitance in Interconnects C=C D A C D is the capacitance density and A is the area of the overlap
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EE 330 Lect 11 Fall 2011 - EE 330 Lecture 11 IC Fabrication...

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