EE 330 Lect 37 Fall 2011

EE 330 Lect 37 Fall 2011 - EE 330 Lecture 37 Digital...

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EE 330 Lecture 37 Digital Circuit Design
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Amplifier Design Strategies Draw on Past Experience Often leads to Circuit or Architecture that can be modified or extended Remember unique characteristics observed for circuit structures for future use even if not relevant in an existing deisgn Identify the degrees of freedom in the design and the number of constraints and then systematically explore the design space Simulation-guided computer simulation is not an effective way of exploring a multi-variable design space ! Review from Last Lecture
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Digital Circuit Design Most of the remainder of the course will be devoted to digital circuit design F A B A B C C F 3.5V M 6 M 4 M 5 M 3 M 2 M 1 module gates (input logic [3:0] a,b, output logic [3:0] y1,y2,y3,y4,y5); assign y1 = a&b; //AND assign y2 = a | b; //OR assign y3 = a ^ b; //XOR assign y4 = ~(a & b); //NAND assign y5 = ~( a | b); //NOR endmodule Verilog library IEEE; use IEEE.STD_LOGIC_1164.all; entity gates is port(a,b: in STD_LOGIC_VECTOR(3 dowto 0); y1,y2,y3,y4,y5:out STD_LOGIC_VECTOR(3 downto 0)); end; architecture synth of gates is begin y1 <= a and b; y2 <= a or b; y3 <= a xor b; y4 <= a nand b; y5 <= a nor b; end; VHDL Standard Cell Library Review from Last Lecture
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Digital Circuit Design Hierarchical Design Basic Logic Gates Properties of Logic Families Characterization of CMOS Inverter Static CMOS Logic Gates Ratio Logic Propagation Delay Simple analytical models Elmore Delay Sizing of Gates Propagation Delay with Multiple Levels of Logic Optimal driving of Large Capacitive Loads Power Dissipation in Logic Circuits Other Logic Styles Array Logic Ring Oscillators
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Hierarchical Digital Design Domains: Behavioral: Structural : Top Bottom Physical Multiple Levels of Abstraction
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Hierarchical Digital Design Domains: Behavioral: Structural : Top Bottom Physical Bottom Up Design Top Down Design
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Hierarchical Digital Design Domains: Top Bottom Bottom Up Design Top Down Design Behavioral: Structural : Physical Multiple Sublevels in Each Major Level All Design Steps may not Fit Naturally in this Description
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Hierarchical Analog Design Domains: Behavioral: Structural : Top Bottom Physical Bottom Up Design Top Down Design
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Behavioral : Describes what a system does or what it should do Structural : Identifies constituent blocks and describes how these blocks are interconnected and how they interact Physical : Describes the constituent blocks to both the transistor and polygon level and their physical placement and interconnection Hierarchical Digital Design Domains: Multiple representations often exist at any level or sublevel
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EE 330 Lect 37 Fall 2011 - EE 330 Lecture 37 Digital...

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