EE 330 Lect 44 Spring 2011

# EE 330 Lect 44 Spring 2011 - EE 330 Lecture 44 Digital...

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EE 330 Lecture 44 Digital Circuits Optimally Driving Large Capacitive Loads Power Dissipation High Frequency Models

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Overdrive Factors C A F 1000 The factor by which the devices are scaled above those of the reference inverter is termed the overdrive factor, OD Scaling all widths by a constant does not compromise the symmetry between the rise and fall times Judicious use of overdrive can dramatically improve the speed of digital circuits Large overdrive factors are often used Review from last lecture
Propagation Delay in Multiple-Levels of Logic with Stage Loading C IN /C REF Equal Rise/Fall Inverter NAND NOR 1 3k+1 4 3+k 4 Minimum Sized Overdrive HL LH 1 1 1/2 1/2 1/2 1 1/3 NOR NAND Inverter HL LH HL LH 1 1 1 1 1 1/(3k) 1/k 1/3 Equal Rise/Fall (with OD) OD 3k+1 OD 4 3+k OD 4 Asymmetric OD (OD HL , OD LH ) HL LH OD +3 OD 4 OD OD OD OD OD OD HL LH OD +3k OD 4 HL LH k OD +3 OD 4  OD HL OD LH OD HL OD LH OD HL OD LH n I(k+1) k=1 k F OD n I(k+1) k=1 F 1    n I(k+1) k=1 HLk LHk 11 F 2 OD OD t PROP /t REF 1 n I(k+1) k=1 HLk LHk F 2 OD OD OD H OD L 1  5 PROP REF I(k+1) k=1 HLk LHk t =t F 2 OD OD Review from last lecture

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Propagation Delay in Multiple-Levels of Logic with Stage Loading A F 8 6 M M 3 20fF 50fF 8 3 4 2 Mixture of Minimum-sized gates, equal rise/fall gates and OD ? PROP REF t = t Review from last lecture
Driving Large Capacitive Loads A F C L Assume driving by a reference inverter Assume C L =1000C REF In 0.5u proc t REF =20ps, C REF =4fF,R PDREF =2.5K Example t PROP =?

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Driving Large Capacitive Loads A F C L Assume driving by a reference inverter Assume C L =1000C REF In 0.5u proc t REF =20ps, C REF =4fF,R PDREF =2.5K Example t PROP =1000t REF t PROP is too long !
Driving Large Capacitive Loads A F C L 1000 Assume first stage is a reference inverter Example Assume C L =1000C REF t PROP =? 2 I(k+1) PROP REF k=1 k F t =t OD   11 1000 1000 1000 1 1 1000    PROP REF REF t =t t   1001 PROP REF tt Delay of second inverter is really small but overall delay is even longer than before!

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Driving Large Capacitive Loads A F C L 10 100 Assume first stage is a reference inverter Example Assume C L =1000C REF 3 I(k+1) PROP REF k=1 k F t =t OD   1 1 1 10 100 1000 10 10 10 1 10 100    PROP REF REF t =t t PROP REF t = 30t Dramatic reduction is propagation delay (over a factor of 30!) What is the fastest way to drive a large capacitive load?
Optimal Driving of Capacitive Loads Assume first stage is a reference inverter A F C L 1 θ 1 θn-1 θn-2 θ 2 Need to determine the number of stages, n, and the OD factors for each stage to minimize t PROP . { θ 1 , θ 2 ,...θ n-1 ,n} n k PROP REF k=1 k-1 θ t =t θ n I(k+1) PROP REF k=1 k F t =t OD where θ 0 =1 , θ n =C L /C REF This becomes an n-parameter optimization (minimization) problem !

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EE 330 Lect 44 Spring 2011 - EE 330 Lecture 44 Digital...

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