IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 36, NO. 5, MAY 2001
A New Model for Thermal Channel Noise of
Deep-Submicron MOSFETS and its Application in
, Member, IEEE
, Peter Klein, and Marc Tiebout
, Member, IEEE
In this paper, we present a simple analytical model
for the thermal channel noise of deep-submicron MOS transistors
including hot carrier effects. The model is verified by measure-
ments and implemented in the standard BSIM3v3 SPICE model.
We show that the consideration of this additional noise caused by
hot carrier effects is essential for the correct simulation of the noise
performance of a low noise amplifier in the gigahertz range.
Integrated circuit modeling, integrated circuit
noise, MOSFETs, MOSFET amplifiers, semiconductor device
modeling, semiconductor device noise.
UE TO continuous reduction of minimum channel length
in CMOS technologies in the last years, CMOS has
become a candidate for RF applications. For quarter and
subquarter micron technologies, transit frequencies
range of 40–70 GHz and maximum oscillation frequencies
up to 40 GHz and more are possible for nMOS transistors
. For these devices, the classical assumption of thermal
equilibrium in the calculation of the channel noise is question-
able. Additionally, so-called hot carrier noise is observed for
short-channel transistors –.
The purpose of this work is to develop an analytical model
for thermal channel noise of extreme short-channel transistors
and the implementation in the BSIM3v3 model. With this model
RF-CMOS designers are able to simulate the noise performance
of their designs (e.g., low noise amplifiers (LNAs), which are an
essential part of system-on-a-chip solutions for wireless com-
munication), and to find the optimum between noise perfor-
mance and ac performance.
II. THERMAL CHANNEL NOISE MODEL
A. Classical Models for Thermal Channel Noise
In most MOS SPICE models normally used, the following
equation for the spectral noise density of the drain current
implemented and widely used in noise simulations:
Manuscript received July 24, 2000; revised December 1, 2000.
G. Knoblinger and P. Klein are with Infineon Technologies AG Germany, SIM
PX1, D-81609, Munich, Germany (e-mail: firstname.lastname@example.org).
M. Tiebout is with Infineon Technologies AG Germany, WS TI S RSC,
D-81609 Munich, Germany.
Publisher Item Identifier S 0018-9200(01)03027-X.
is the gate transconductance,
is the channel conductance,
is the bulk transconductance.
In  the following formula is derived:
is the inversion layer charge,
is the channel length, and
is the mobility.
In general, an effective mobility