EE2730 Homework 6

EE2730 Homework 6 - 22 This counter has an input labeled...

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Homework Homework is due Monday, 11/08 at 7:45AM in class. 1. Design the counters defined below: a. Mod 8 counter with count sequence: 1, 3, 5, 7, 9, 11, 13, 15, 1, 3… b.Mod 6 counter with count sequence: 0, 1, 1, 2, 2, 3, 0, 1. .. 2. Modify the self-correcting 4-bit Johnson counter in figure 8-67 to count as shown in the table below: State Q3 Q2 Q1 Q0 S1 0 0 0 0 S2 1 0 0 0 S3 1 1 0 0 S4 1 1 1 0 S5 1 1 1 1 S6 0 1 1 1 S7 0 0 1 1 S8 0 0 0 1 Also draw a state diagram, like one in figure 8-63, for your counter. 3. Design a mod 32 counter with following count sequence: 21, 22, …, 51, 52, 21,
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Unformatted text preview: 22 This counter has an input labeled RESET_L used to reset the count to the initial count of 21. Label the outputs Q0, Q1, , Q7, with Q7 being the most significant bit. 4. Design a 4-bit shift register with the following functions: Input Next state Function S2 S1 S0 QA* QB* QC* QD* Hold 0 0 0 QA QB QC QD Shift right 0 0 1 RIN QA QB QC Shift left 0 1 0 QB QC QD LIN Load 0 1 1 A B C D Complement 1 0 0 A B C D Rotate right 1 0 1 QD QA QB QC Rotate left 1 1 0 QB QC QD QA You need to show all your work; otherwise no points will be given....
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This note was uploaded on 01/31/2012 for the course EE 2730 taught by Professor Desouza during the Fall '08 term at LSU.

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