{[ promptMessage ]}

Bookmark it

{[ promptMessage ]}

figs07

figs07 - FIGURES FOR CHAPTER 7 V A RS C V V ID Figure 7-1...

Info iconThis preview shows pages 1–10. Sign up to view the full content.

View Full Document Right Arrow Icon
F IGURES FOR C HAPTER 7 Figure 7-1 Large-scale diode model. R S C I D V A V V
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Table 7-1 Diode model parameters and their corresponding SPICE parameters Symbol SPICE Description Typical values I S IS saturation current 1 fA–10 μ A n N emission coefficient 1 τ T TT transit time 5 ps–500 μ s R S RS ohmic resistance 0.1–20 V diff VJ barrier voltage 0.6–0.8 V ( pn ) 0.5–0.6 V (Schottky) C J 0 CJ0 zero-bias junction capacitance 5–50 pF ( pn ) 0.2–5 pF (Schottky) m M grading coefficient 0.2–0.5 W g EG bandgap energy 1.11 eV (Si) 0.69 eV (Si-Schottky) p t XTI saturation current temperature coefficient 3 ( pn ) 2 (Schottky)
Background image of page 2
(a) tangent approximation at Q- point (b) linear circuit model. Figure 7-2 Small-signal diode model. R S R ( V dQ ) C ( V ) V I D V= V AA Q I= I DQ V A I D
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Table 7-2 Diode model parameters for different temperatures T , °K 250 300 350 400 W g ( T ), eV 1.128 1.115 1.101 1.086 I s ( T ), A 5.1 × 10 –19 5.0 × 10 –15 3.3 × 10 –12 3.8 × 10 –10 V Q , V 0.979 0.898 0.821 0.748 R d , 0.5 0.6 0.7 0.8 C d , pF 999.5 832.9 713.9 624.7
Background image of page 4
Figure 7-3 Frequency behavior of the diode impedance for different junction temperatures. 10 100 1000 Frequency , MHz f 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 Impedance | |, Z 250 ° K 300 ° K 350 ° K 400 ° K
Background image of page 5

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
(a) Voltage and current convention for npn transistor (b) Ebers-Moll circuit model Figure 7-4 Large-signal Ebers-Moll circuit model. I B I C V BE V CE B EE C I B I C I F I R α RR I α FF I V BE V
Background image of page 6
(a) Forward active mode (b) Reverse active mode Figure 7-5 Simplified Ebers-Moll equations for forward and reverse active modes. B EE C I R α R R I V BE V CE B E E C I F a F F I V BE V CE
Background image of page 7

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
(a) Dynamic Ebers-Moll chip model (b) RF model with parasitic terminal effects Figure 7-6 Dynamic Ebers-Moll model and parasitic element refinements. R BB I F B B C C E E ' I R α RR I α FF I R CC R EE C dc C jc C de C je Ebers-Moll model R BL B E C C be bc R CL R EL C ce L BL L CL L EL Ebers-Moll model
Background image of page 8
Figure 7-7 Transport representation of static Ebers-Moll injection model.
Background image of page 9

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Image of page 10
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}

Page1 / 38

figs07 - FIGURES FOR CHAPTER 7 V A RS C V V ID Figure 7-1...

This preview shows document pages 1 - 10. Sign up to view the full document.

View Full Document Right Arrow Icon bookmark
Ask a homework question - tutors are online