ADSP_B52x Blackfin dastasheet

ADSP_B52x Blackfin dastasheet - Blackfin Embedded Processor

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Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc. Blackfin Embedded Processor ADSP-BF522/ADSP-BF523/ADSP-BF524/ADSP-BF525/ADSP-BF526/ADSP-BF527 Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2010 Analog Devices, Inc. All rights reserved. FEATURES Up to 600 MHz high performance Blackfin processor Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs, 40-bit shifter RISC-like register and instruction model for ease of programming and compiler-friendly support Advanced debug, trace, and performance monitoring Accepts a wide range of supply voltages for internal and I/O operations. See Specifications on Page 27 Programmable on-chip voltage regulator (ADSP-BF523/ ADSP-BF525/ADSP-BF527 processors only) Qualified for Automotive Applications. See Automotive Products on Page 86 289-ball and 208-ball CSP_BGA packages MEMORY 132K bytes of on-chip memory (See Table 1 on Page 3 for L1 and L3 memory size details) External memory controller with glueless support for SDRAM and asynchronous 8-bit and 16-bit memories Flexible booting options from external flash, SPI, and TWI memory or from host devices including SPI, TWI, and UART Code security with Lockbox Secure Technology one-time-programmable (OTP) memory Memory management unit providing memory protection PERIPHERALS USB 2.0 high speed on-the-go (OTG) with Integrated PHY IEEE 802.3-compliant 10/100 Ethernet MAC Parallel peripheral interface (PPI), supporting ITU-R 656 video data formats Host DMA port (HOSTDP) 2 dual-channel, full-duplex synchronous serial ports (SPORTs), supporting eight stereo I 2 S channels 12 peripheral DMAs, 2 mastered by the Ethernet MAC 2 memory-to-memory DMAs with external request lines Event handler with 54 interrupt inputs Serial peripheral interface (SPI) compatible port 2 UARTs with IrDA support 2-wire interface (TWI) controller Eight 32-bit timers/counters with PWM support 32-bit up/down counter with rotary support Real-time clock (RTC) and watchdog timer 32-bit core timer 48 general-purpose I/Os (GPIOs), with programmable hysteresis NAND flash controller (NFC) Debug/JTAG interface On-chip PLL capable of frequency multiplication Figure 1. Processor Block Diagram SPORT0 TIMER0 VOLTAGE REGULATOR* *REGULATOR ONLY AVAILABLE ON ADSP-BF523/ADSP-BF525/ADSP-BF527 PROCESSORS PORT J GPIO PORT H GPIO PORT G GPIO PORT F JTAG TEST AND EMULATION PERIPHERAL ACCESS BUS OTP MEMORY COUNTER WATCHDOG TIMER RTC TWI SPORT1 NFC PPI UART0 SPI TIMER7-1 EMAC HOST DMA BOOT ROM DMA ACCESS BUS INTERRUPT CONTROLLER DMA CONTROLLER L1 DATA MEMORY L1 INSTRUCTION MEMORY USB 16
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This note was uploaded on 02/02/2012 for the course ELECTRICAL EECE4572 taught by Professor Salehi during the Spring '11 term at Northeastern.

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ADSP_B52x Blackfin dastasheet - Blackfin Embedded Processor

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