Chapter 03 - Digital Logic

# Chapter 03 - Digital Logic - Chapter 3 - Digital Logic B A...

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Chapter 3 - Digital Logic B A

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BYU CS/ECEn 124 Chapter 3 - Digital Logic 2 History of the Transistor Around 1945, Bell Labs scientists discovered that silicon was comprised of two distinct regions differentiated by the way in which they favored current flow. The area that favored positive current flow they named "p" and the area that favored negative current flow they named "n". The transistor effect describes the change from a condition of conductivity (switched “on”, full current flow) to a condition of insulation (switched “off”, no current flow). The Transistor
BYU CS/ECEn 124 Chapter 3 - Digital Logic 3 Digital Logic Circuits Computers = large number of simple structures Intel 4004 = 2,300 transistors Intel Pentium 4 = 42 million transistors Intel Core 2 Duo = 291 million transistors Intel i7 “Bloomfield” = 731 million transistors The Transistor

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BYU CS/ECEn 124 Chapter 3 - Digital Logic 4 Moore’s Law Early 1900’s 1947 1950’s Moore’s Law: The number of transistors per area doubles every 1.5 - 2 years. 1960’s 1970’s 1980’s 1990’s 2000’s The Transistor 2010’s
c u r e n t f l o w gate N-type Transistor BYU CS/ECEn 124 Chapter 3 - Digital Logic 5 The MOS Transistor A transistor acts like a switch Conducts current when "ON" No current flow when "OFF" MOS = metal-oxide semiconductor CMOS = complementary MOS with both N and P transistors The Transistor Complementary Gate (input) FET (output) GND (0) Open Vcc (3.3v) Closed Gate (input) FET (output) GND (0) Closed Vcc (3.3v) Open gate P-type Transistor

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B E C 0 BYU CS/ECEn 124 Chapter 3 - Digital Logic 6 N Type P Type Field Effect Transistor The Transistor C E B 0 B E C 1 C E B 1
Source BYU CS/ECEn 124 Chapter 3 - Digital Logic 7 CMOS Gates Pull-up Structure (P-Type) Pull-down Structure (N-Type) C omplementary The “C” in CMOS Even in the digital world, "EVERYTHING IS ANALOG"! The Transistor 1 0 Complementary pull-up / pull-down logic pull-down is " ON" when pull-up is "OFF " and vise versa.

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BYU CS/ECEn 124 Chapter 3 - Digital Logic 8 The Inverter in 1 0 out 0 1 0 1 on off 1 1 0 0 on off This is a truth-table. It tells what the output will be for all combinations of the inputs. Inverter Symbols Symbols are abstractions! Digital Logic Devices In out 0 1 1 0
BYU CS/ECEn 124 Chapter 3 - Digital Logic 9 The NOR Gate ( NOT-OR ) NOR Symbols a b 1 0 0 NOR Digital Logic Devices on off off on 1 0 0 1 0 0 off off on on 0 a b 1 0 0 a b NOR 0 0 1 0 1 0 1 0 0 1 1 0

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BYU CS/ECEn 124 Chapter 3 - Digital Logic 10 The OR Gate Digital Logic Devices a b OR 0 0 0 0 1 1 1 0 1 1 1 1 OR Symbol How do you build an OR gate? a b 1 0 0 a b OR 1 0 OR
BYU CS/ECEn 124 Chapter 3 - Digital Logic 11 The NAND Gate ( NOT-AND ) on off off on 1 1 0 1 1 0 1 0 1 1 1 0 off off on on b a 1 1 0 NAND NAND Symbols Digital Logic Devices a b NAND 0 0 1 0 1 1 1 0 1 1 1 0

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BYU CS/ECEn 124 Chapter 3 - Digital Logic 12 The AND Gate How do you build an AND gate?
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Chapter 03 - Digital Logic - Chapter 3 - Digital Logic B A...

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