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HW_03 - CS/ECEn 124 W2012 Homework#3 Digital Logic(Ch 3...

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CS/ECEn 124, W2012 Homework #3 Digital Logic (Ch 3) Name Section Score /46 Questions: Answers: 1. (10 points) Identify the type of logic (combinational or sequential) for each of the following: a. ALU f. Inverter b. D-latch g. Memory word c. Decoder h. Multiplexer d. Driver i. Register e. Flip-Flop j. State Machine 2. (3 points) What problem happens to Q and Q' when a 1 is applied to both the set (S) and reset (R) inputs of the following latch? 3. (8 points) Complete the timing relationship for the following master-slave flip-flop. (Assume the flip-flop is in the clear state prior to the occurrence of the clock pulse.) C D Y Q Q' 4. (8 points) Program the following equation into the Programmable Logic Array (PLA) to the right by filling in (marking) the appropriate question mark boxes to make wire connections. (The symbol is an exclusive OR, left to right associativity.) Z = A B C BYU, ECEn/CS 124, W2012 Homework #3 Page 1/2 Y
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5. (5 points) Fill in the blank entries of the state table to the right for the state diagram below.
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