HW_04

HW_04 - OPCODE | SR | DR | IMM (Opcode, Source Register,...

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CS/ECEn 124, W2012 Homework #4 Von Neumann (Ch 4) MSP430 ISA (Ch 5) Name Section Score / 47 Questions: Answers: 1. (11 points) For each statement below, indicate if a CISC or RISC architecture is best described: a. Cheaper processor. b. Easier to program. c. Favors pipe-lining. d. Instructions do more. e. Instructions execute faster. f. Less bus activity. g. Many different instructions. h. Multi-cycle instructions. i. Requires fewer transistors. j. Uses more program memory. k. Uses microcode. 2. (4 points) What is misleading about the term “program counter”? What would be a better (more insightful) term for this register? 3. (4 points) What is an opcode? What is an operand? Describe what each does. 4. (4 points) Describe address space and addressability. BYU, ECEn/CS 124, W2012 Homework #4 Page 1/2
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5. (4 points) A memory's addressability is 8 bits. What does that tell you about the size of the Address Bus? What does that tell you about the size of the Data Bus? 6. (4 points) Suppose a 32-bit instruction has the following format:
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Unformatted text preview: OPCODE | SR | DR | IMM (Opcode, Source Register, Destination Register, Immediate Value) If there are 60 defined opcodes and 32 registers that can be used either for the source and/or destination register, what is the largest positive number that can be represented by the immediate (IMM) field? (Assume IMM is a 2's complement number.) 7. (4 points) The number of instructions per second executed by a processor is measures in millions of instructions per second (MIPS). Why or why not is MIPS a good metric for comparing different machine architectures? 8. (12 points) Match the following terms to the best answer: 2, 4, or 6 1 a R0 Addressing modes 2 b R2 Clock signal 3 c R1 Constant generator 4 d R3 CPU OFF 5 e 27 Destination modes 6 f 7 Instructions 7 g Register operations Program Counter 8 h Instruction length Single Cycle 9 i Status register, bit 4 Stack Pointer 10 j Overflow Status Register 11 k MCLK V 12 l 4 BYU, ECEn/CS 124, W2012 Homework #4 Page 2/2...
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HW_04 - OPCODE | SR | DR | IMM (Opcode, Source Register,...

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