HW_04

HW_04 - CS/ECEn 124, W2012 Homework #4 Von Neumann (Ch 4)...

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BYU, ECEn/CS 124, W2012 Homework #4 Page 1/2 CS/ECEn 124, W2012 Homework #4 Von Neumann (Ch 4) MSP430 ISA (Ch 5) Name Section Score / 47 Questions: Answers: 1. (11 points) For each statement below, indicate if a CISC or RISC architecture is best described: a. Cheaper processor. b. Easier to program. c. Favors pipe-lining. d. Instructions do more. e. Instructions execute faster. f. Less bus activity. g. Many different instructions. h. Multi-cycle instructions. i. Requires fewer transistors. j. Uses more program memory. k. Uses microcode. 2. (4 points) What is misleading about the term “program counter”? What would be a better (more insightful) term for this register? 3. (4 points) What is an opcode? What is an operand? Describe what each does. 4. (4 points) Describe address space and addressability.
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BYU, ECEn/CS 124, W2012 Homework #4 Page 2/2 5. (4 points) A memory's addressability is 8 bits. What does that tell you about the size of the
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HW_04 - CS/ECEn 124, W2012 Homework #4 Von Neumann (Ch 4)...

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