2-Mod3_LS_2011

2-Mod3_LS_2011 - ECE 270 Introduction to Digital System...

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Unformatted text preview: ECE 270 Introduction to Digital System Design © 2011 by D. G. Meyer 1 Lecture Summary – Module 3-A Combinational PLDs and ABEL Reference: Text (4 th Ed.), pp. 237-255, 370-383; (3 rd Ed.), pp. 249-263, 337-351 • overview o PLD – programmable logic device s first were programmable logic arrays (PLAs) • two-level, AND-OR, SoP • limitations: inputs, outputs, P-terms • both true and complemented version of each input available • connections made by “fuses” (non-volatile memory cells) • each AND gate’s inputs any subset of true/complemented input variables • each OR gate’s inputs any subset of AND gate outputs s special case of PLA is programmable array logic (PAL) • fixed OR array (AND gates can not be shared) • each output includes (inverting) tri-state buffer • some pins may be used for either input or output (“I/O pins”) • generic array logic (GAL) devices are basically PALs • combinational PLDs – focus on GAL devices o fixed OR array, with dedicated AND gates o macrocell associated with each output pins contains configuration logic o output polarity control allows 0’s (OFF set) or 1’s (ON set) of function to be selected, realizing either PoS or SoP form of equation o GALs are erasable and reprogrammable (“EPLDs”) o your digital parts kit contains three GAL devices: 16V8, 22V10, and 26V12 o a universal programmer is needed to erase and reprogram these devices • GAL16V8 closeup o what part number indicates o block diagram o macrocell ECE 270 Introduction to Digital System Design © 2011 by D. G. Meyer 2 • hardware description language o an HDL is a “logic programming language” (caution: not sequential in nature like a computer programming language, but rather a means of describing hardware design) o we will use the Advanced Boolean Expression Language (ABEL) as an introductory hardware description language o we will compile our ABEL programs using ispLever (software tool available from Lattice Semiconductor – go to website to download trial version) • ABEL o program contents s documentation (e.g., comments) s declarations of pins, inputs, outputs s statements that specify logic functions s (optionally) test vectors o program structure s identifiers s Module statement s comments s pin declarations, “istype” keyword s Equations statement s equations – written like assignments, terminated by a semicolon s Truth_Table statement s Test_Vectors statement s End statement o basic symbols used in formulating ABEL equations s & AND s # OR s ! NOT s $ XOR s !$ XNOR s = assignment MODULE abel_ex TITLE 'ABEL Combinational Example for GAL16V8' DECLARATIONS " Input pins A pin 2; B pin 3; C pin 4; D pin 5; " Output pins X pin 12 istype 'com'; Y pin 13 istype 'com'; Z pin 14 istype 'com'; EQUATIONS X = A&B # !C&D; Y = !B&D # !A&B&D; Z = A & !B&C&!D; END ECE 270 Introduction to Digital System Design © 2011 by D. G. Meyer 3 4 12 8 1 5 13 9 3 7 15 11 2 6 14 10 E ′ E R ′ R ′ R S ′ S T ′ T ′...
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2-Mod3_LS_2011 - ECE 270 Introduction to Digital System...

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