2-Mod6_LS_2011

2-Mod6_LS_2011 - ECE 270 Introduction to Digital System...

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Unformatted text preview: ECE 270 Introduction to Digital System Design © 2011 by D. G. Meyer 1 Opcode Mnemonic Function Performed 0 0 0 LDA addr Load A with contents of location addr 0 0 1 STA addr Store contents of A at location addr 0 1 0 ADD addr Add contents of addr to contents of A 0 1 1 SUB addr Subtract contents of addr from contents of A 1 0 0 AND addr AND contents of addr with contents of A 1 0 1 HLT Halt – Stop, discontinue execution Addr Instruction Comments 00000 LDA 01011 Load A with contents of location 01011 00001 ADD 01100 Add contents of location 01100 to A 00010 STA 01101 Store contents of A at location 01101 00011 LDA 01011 Load A with contents of location 01011 00100 AND 01100 AND contents of 01100 with contents of A 00101 STA 01110 Store contents of A at location 01110 00110 LDA 01011 Load A with contents of location 01011 00111 SUB 01100 Subtract contents of location 01100 from A 01000 STA 01111 Store contents of A at location 01111 01001 HLT Stop – discontinue execution Lecture Summary – Module 6-A Simple Computer – Top-Down Specification Reference: Meyer Supplemental Text, pp. 1-18 • overview o the “ultimate application” of what we have learned o computer defn – sequential execution of stored program o architecture defn – arrangement and interconnection of functional blocks o house analogy • big picture o input/output o start (reset) o clock • floor plan o programming model o instruction set o registers o instruction format s opcode s address o two-address machine • programming example • memory snapshot Calculation of ADD, AND, and SUB results: ECE 270 Introduction to Digital System Design © 2011 by D. G. Meyer 2 • block diagram o memory o program counter o instruction register o arithmetic logic unit o instruction decoder and micro-sequencer • notes o each functional block is “self-contained” (can be independently tested ) o can add more instructions by increasing number of opcode bits o can add more memory by increasing the number of address bits o can increase numeric range by increasing the number of data bits ECE 270 Introduction to Digital System Design © 2011 by D. G. Meyer 3 Lecture Summary – Module 6-B Simple Computer – Instruction Tracing Reference: Meyer Supplemental Text, pp. 18-24 • overview o two basic steps in “processing” an instruction s fetch s execute o will trace the processing of several instructions to better understand this • program segment to trace • worksheet • step 1 (after START pushbutton pressed) Addr Instruction Comments 00000 LDA 01011 Load A with contents of location 01011 00001 ADD 01100 Add contents of location 01100 to A 00010 STA 01101 Store contents of A at location 01101 Notes: 1. The clock edges drive the synchronous functions of the computer (e.g., increment program counter) 2. The decoded states (here, fetch and execute) enable the combinational functions of the computer (e.g., turn on tri-state buffers) ECE 270 Introduction to Digital System Design © 2011 by D. G. Meyer 4 ECE 270...
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This note was uploaded on 02/05/2012 for the course ECE 270 taught by Professor Staff during the Spring '08 term at Purdue.

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2-Mod6_LS_2011 - ECE 270 Introduction to Digital System...

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