xapp967 - Application Note: Embedded Processing Creating an...

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XAPP967 (v1.1) February 26, 2007 www .xilinx.com 1 © 2007 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and further disclaimers are as listed at http://www .xilinx.com/legal.htm . PowerPC is a trademark of IBM Inc. All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice. NOTICE OF DISCLAIMER: Xilinx is providing this design, code, or information "as is." By providing the design, code, or information as one possible implementation of this feature, application, or standard, Xilinx makes no representation that this implementation is free from any claims of infringement. You are responsible for obtaining any rights you may require for your implementation. Xilinx expressly disclaims any warranty whatsoever with respect to the adequacy of the implementation, including but not limited to any warranties or representations that this implementation is free from claims of infringement and any implied warranties of merchantability or fitness for a particular purpose. Abstract Adding custom logic to an embedded design targeting the Xilinx FPGA can be achieved using different methods and techniques. This application note focuses on using the EDK OPB IPIF Interface to achieve such integration. This document contains guidelines for choosing the required OPB IPIF Services to use to interface the user logic to the OPB without having to create all the provided IPIF Services. Initially, the Create IPIF Wizard is used to generate a user core template, then the user logic HDL is integrated to the template according to the core requirements. Finally, the IPIF Wizard will be used to import the newly created core back into the EDK environment. The IPIF Wizard generates a drivers template for the IP. The template is used to access the Custom OPB Core from the System SW Application. An example design targeting the Xilinx Reference Platform ML403 is provided to illustrate the design flow, understand the hardware and software implementations, and to test the generated system on the ML403 demonstration board. Included Systems Included with this application note is one reference system: www .xilinx.com/b vdocs/appnotes/xapp967.zip Introduction Adding custom logic to an embedded design can be done using different approaches. Custom logic can communicate with the embedded system using the OCM bus in a PowerPC™ based system. For MicroBlaze™ systems, the FSL interfaces are an excellent way to make logic directly visible to the processor. Using the OPB/PLB GPIOs with an indexed addressing (if required) can help in integrating user logic to an embedded design. The second port, Port B, of the BRAM memories connected to the OCM, PLB, LMB, or OPB
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xapp967 - Application Note: Embedded Processing Creating an...

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