Lecture-10-28-handou - 1 ME-340 Circuits& Mechatronics Lecture 27 2010.10.28 Tentative class forecast • Week 10/24 returned exam • ch 13/12

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Unformatted text preview: 10/28/2011 1 ME-340 Circuits & Mechatronics Lecture # 27 2010.10.28 Tentative class forecast • Week 10/24: returned exam • ch 13/12 hw ch 13 due Friday 10/28 3rd quiz Week 10/31: ch 12/14 hw ch 12 due • Week 11/07: ch 14 hw ch 14 due Friday 11/11: 2nd exam 2 Today: Quiz Chapters 10 and 13 • 2 problems from chapters 10 and 13 • 30 minutes • No cheat sheet • Similar to Homework problems and Review session problems 3 Reminder Problem Homework (Due We 11/2 in class) • Hambley 5 th edition, Chapters 12, Problems: NMOS-PMOS transistors (2): p12.8, p12.15 Load line analysis (2): p12.17, p12.20 Bias circuits (2): p12.26, p12.33 Small signal equivalent (2): p12.41, p12.42, p12.45 Common source amplifiers (1): p12.52 4 10/28/2011 2 Reminder Chapter Reading Homework • Read chapter 14 • Summarize each chapter in 10 lines • Return it in class 5 Review Session • Weekly, ednesdays, 3-4 ETC 2.108 6 Recap last lecture 7 FET / BJT Transistors • 3-terminal semiconductor devices, for – Amplification • Ampl ifier magnifies signal (current/voltage across 2 input terminals), external power boosts copy of signal (current/voltage) • Input controls output: transistors nonlinear devices – Switching • Switch controls large current/voltage over 2 terminals, via low power voltage or current to 3 rd terminal • Two major transistors: – BJT: B ipolar J unction T ransistor – FET: F ield- E ffect T ransistor 10/28/2011 3 Transistor Applications: Controlled Sources μ : internal gain of transistor Note Thevenin & Norton models @ outputs Transistor Applications: Electronic Switches Switch open (OFF), input ≤ 0 Switch closed (ON), input > 0 Moore’s Law 11 Montecito CPU 1.7 Billion Transistors 2006 Field-Effect Transistors • Transistor = Electronic valve, one set of terminals control another set • FET terminals: Source, Gate, Drain, Body or Bulk (grounded) Arrowhead points from p to n 10/28/2011 4 • Source –Drain “channel” • Gate voltage v GS controls S-D drain current i D • Gate = Valve “handle”, S–D channel= “pipe” • Biases needed: form channel & create flow • Want i D = K V GS , but reality is • Highly nonlinear device: i D = i D ( V GS , V DS ) • Curved characteristics • Cutoff & saturation • One way current: source to drain FET Operation & Problems • S –D “channel” • Gate voltage v gs controls S- D current i D FET Operation (NMOS, n-channel) • v gs > v to (threshold voltage)- Repels holes from p-region beneath gate, attracts electrons from n + regions of drain & source, forms S-D channel - v gs controls channel conductance via # of charge carriers in channel • v gs > 0: induces S-D current i D = i D ( v gs , v ds ) p + , n + : heavily doped p, n: normal doping V gs =0 i D V gs > V to More Details on FETs • FET (Field-Effect Transistor): – Channel width & conductance influenced by electric field of v gs & v ds – voltage-controlled current device: v gs controls i sd • MOSFET (Metal-Oxide-Semiconductor FET)...
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This note was uploaded on 02/07/2012 for the course M E 340 taught by Professor Staff during the Spring '08 term at University of Texas at Austin.

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Lecture-10-28-handou - 1 ME-340 Circuits& Mechatronics Lecture 27 2010.10.28 Tentative class forecast • Week 10/24 returned exam • ch 13/12

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