LECTURE2

LECTURE2 - CS 161 Design and Architecture of Computer...

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.1 1999©UCB CS 161 Design and Architecture of Computer Systems Lecture 2 Instructor: L.N. Bhuyan (http://www.engr.ucr.edu/faculty/cs/bhuyan.html)
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.2 1999©UCB What is “Computer Architecture”? I/O system Processor Compiler Operating System (Unix; Windows 9x) Application (Netscape) Digital Design Circuit Design Instruction Set Architecture ° Key Idea: levels of abstraction hide unnecessary implementation details helps us cope with enormous complexity of real systems Datapath & Control transistors, IC layout Memory Hardware Software Assembler CS 161
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.3 1999©UCB What is “Computer Architecture”? ° Computer Architecture = Instruction Set Architecture (ISA ) - the one “true” language of a machine - boundary between hardware and software - the hardware’s specification ; defines “what” a machine does; + Machine Organization - the “guts” of the machine; “how” the hardware works; the implementation ; must obey the ISA abstraction ° We will explore both, and more!
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.4 1999©UCB Levels of Abstraction High Level Language Program (e.g., C) Assembly Language Program (e.g.,MIPS) Machine Language Program (MIPS) Datapath Transfer Specification Compiler Assembler Machine Interpretation temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) 0000 1001 1100 0110 1010 1111 0101 1000 1010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111 ° ° IR < - Imem[PC]; PC < - PC + 4 reasons to use HLL language?
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.5 1999©UCB Execution Cycle Instruction Fetch Instruction Decode Operand Fetch Execute Result Store Next Instruction Obtain instruction from program storage Determine required actions and instruction size Locate and obtain operand data Compute result value or status Deposit results in storage for later use Determine successor instruction
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.6 1999©UCB Ch2: Instructions ° Language of the Machine ° More primitive than higher level languages e.g., no sophisticated control flow ° Very restrictive e.g., MIPS Arithmetic Instructions We’ll be working with the MIPS instruction set architecture similar to other architectures developed since the 1980's used by NEC, Nintendo, Silicon Graphics, Sony Design goals: maximize performance and minimize cost, reduce design time
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.7 1999©UCB Basic ISA Classes Accumulator (1 register): 1 address add A acc acc + mem[A] 1+x address addx A acc acc + mem[A + x] Stack: 0 address add tos tos + next General Purpose Register: 2 address add A B EA(A) EA(A) + EA(B) 3 address add A B C EA(A) EA(B) + EA(C) Load/Store: load Ra Rb Ra mem[Rb] store Ra Rb mem[Rb] Ra Memory to Memory: All operands and destinations can be memory addresses.
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.8 1999©UCB Comparing Number of Instructions ° Code sequence for C = A + B for four classes of instruction sets: Stack Accumulator Register Register (register-memory) (load-store) Pop A Load A Load R1,A Load R1,A Pop B Add B Add R1,B Load
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This note was uploaded on 02/09/2012 for the course ECE 565 taught by Professor Lee during the Spring '11 term at IUP.

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LECTURE2 - CS 161 Design and Architecture of Computer...

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