lec3-cache

Computer Architecture, Fifth Edition: A Quantitative Approach (The Morgan Kaufmann Series in Computer Architecture and Design)

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Cache Architecture of Parallel Computers 1 Cache memories (Stone §2.2) : A cache is a small, fast memory which is transparent to the processor and to the programmer. The cache duplicates information that is in main memory. It contains the subset of main memory data that is likely to be needed by the processor in the near future. It is needed because the speed of dynamic RAMs (main memory) have not kept pace with the improvements in logic speed. We actually have a memory hierarchy , where the application programmer only sees a very fast and large virtual memory space that is implemented as: Very fast but small cache within the processor chip, which contains a subset of the Fast external cache, which contains a subset of the Main memory, which contains a subset of the Virtual memory External Cache (Kbytes to Mbytes) 10 - 20 ns (with small cache) 2 - 5 ns Main Memory (Mbytes to Gbytes) 50 - 100 ns Virtual Memory (Gbytes and up) 10 - 100 ms Processor
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© 1997, 1999 E.F. Gehringer, G.Q. Kenney CSC 506, Summer 1999 2 We want to structure the cache to achieve a high hit ratio . Hit — the referenced information is in the cache. Miss — the referenced information is not in cache, and must be read in from main memory. If h is the hit ratio, then we can also define (1 – h ) as the miss ratio . Using the hit ratio, we can express the effective access time of a memory system using a cache as: t eff = t cache + (1 – h ) t main So, for a hit ratio of 90% (0.9), a cache access time of 10 ns, and a main memory access time of 60 ns, we have: t eff = 10 + (1 – 0.9) 60 = 16 ns references of number Total hits of Number ratio Hit 10 9 Cache Hits 60 10 10 10 10 10 10 10 10 10 1 Cache Miss
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Cache Architecture of Parallel Computers 3 A cache can be organized according to four different strategies: Direct Fully associative Set associative Sectored A cache implements several different policies for retrieving and storing information, one in each of the following categories: Fetch policy determines when information is loaded into the cache. Replacement policy determines what information is purged when space is needed for a new entry. Write policy determines how soon information in the cache is written to lower levels in the memory hierarchy. Cache memory organization: Information is moved into and out of the cache in blocks (block locations in the cache are called lines ) . Blocks are usually larger than one byte (or word), • to take advantage of locality in programs, and • because memory can be organized so that it can optimize transfers of several words at a time. A placement policy determines where a particular block can be placed when it goes into the cache. E.g., is a block of memory eligible to be placed in any line in the cache, or is it restricted to certain lines or to a single line?
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© 1997, 1999 E.F. Gehringer, G.Q. Kenney CSC 506, Summer 1999 4 In the following examples , we assume—
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lec3-cache - Cache memories (Stone 2.2): A cache is a...

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