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Unformatted text preview: ? 2 . Consider the following segment of code, and assume you have to schedule it on a MIPS type pipeline . load R0, (R4 ( add R1, R0, #10 load R2, (R5 ( mul R0, R2, #10 mul R4, R2, R1 store R0, (R5 ( Assume you have a standard MIPS type pipelined processor with 5 stages (Fetch, Decode, Execute, Memory, Write-back). Answer the following questions, and explain all your answers . ) a) What are all the data dependencies, and the type of dependency, in the above code ? ) b) If you have no forwarding, do you have stalls in the above code ? ) c) Next, if the pipeline had internal forwarding are there any stalls left in the code ? ) d) Finally, can the above code be rearranged to further minimize the stall cycles . ?...
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This document was uploaded on 02/08/2012.
- Spring '09