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Unformatted text preview: McGill University Faculty of Engineering
Department of Electrical and Computer Engineering
ECSE33OA — Introduction to Electronics Examiner: Dr. David V. Plant; 3% I ,
Associate Examiner: Dr. Rames ari Date: Monday, December 12, 2005
Time: 2:00 — 5:00
Calculator: Faculty Standard Pertinent Information: 1) This is a closedbook examination, no notes permitted. There are 3 pages of equations
provided at the back of the examination. 2) The examination consists of 6 problems; you must answer all 6 problems.
3) The examination is worth 66 total points 4) The examination consists of 10 pages, including this page and the equations pages;
please ensure you have a COMPLETE examination paper. 5) Only the Faculty Standard Calculator is permitted. 6) Questions may be completed in any order, however ensure that you clearly identify
which part of which question you are attempting. Do NOT turn in this exam with your exam booklet Question #1 (12 pts.): Two ampliﬁers are cascaded to provide current to drive the load as shownin Fig 1a. A1 is a voltage ampliﬁer and A2 is a transconductance amplifier.
Both A1 and A2 have Rin = Rout = R. Assume all the diodes are identical and use the constantvoltage drop model. .2" Fig. la a) [3 pts.] Redraw the circuit and replace the ampliﬁers with their equivalent circuits.
(Note: Leave the diodes as they are, do not replace them with a small signal model). b) [3 pts.] Assuming all the diodes are OFF, ﬁnd an expression for the overall
transconductance Gum“ = [Du/v3 in terms of the R“, R, KL, Av and Gm. =10k9 R =2k!) A =200V/V Gm =500mA/V. For artc useR =1kﬂR =R,“ c) [3 pts.] If the current ﬂow through the diodes is Id = SmA, calculate 12,. d) [3 pts.] For the circuit shown in Fig 11), ﬁnd an expression for the voltage gain vow/vs.
Do NOT simplify your answer. (Hint: using KCL.) IF R" N vout RL
Vs Q Fig 1b Question #2 (12 pts.): Consider the following circuit (Fig 2). Use the constantvoltagedrop model for the
diodes. The pnp BJT is in the active mode and has IVBEI = 0.7 and [3=49. All capacitors
are inﬁnite and all diodes have n=2. You may use the following values:
R1= 11.2 k!) Rz=3.5kﬂ
RE=9809 RC=1000 You may neglect the Early Effect for all parts of this question. a) [4 pts.] Determine which diodes (D1D4) are on or off, and calculate the currents
(11311134) through each diode. State your assumptions clearly. b) [1 pt] What is the minimum R2 so that diode D2 is on? c) [3 pts] Draw the smallsignal equivalent circuit; calculating the values of the
smallsignal parameters involved (use your currents from part a) ). You may
neglect the Early effect. d) [2 pts.] Calculate the voltage gain vow/vs, e) [2 pts] If a resistive load were attached to the output node (without affected the
DC operating point), would the gain in part (1) increase or decrease? Why? Question #3 (11 pts): The following circuit (Fig 3) is a MOSFET differential pair with active loads. All FETs
are in saturation mode. Note that M3 is diodeconnected and M4 is not. Neglect channel
length modulation and the Body Effect for all transistors: V01
RL
Fig. 3
You may use the following values:
k..’ = 2*kp’ = 500p.A/V2 th = th = 0.7V VDD = 5V
WIIL] = Wz/Lz = 12.5 [BIAS = 2mA VCM = 3V
W3/L3 = W4/L4 = 4 RL = 5k!) a). [3 pts] Find the value of the DC voltages V1 and V2. (Hint: There is still E
simmetﬂ in this problem) b) [1 pts] Find the upper and lower boundaries on the voltage V3 that will keep M1
and M4 in the saturation mode of operation c) [2 pts] Draw the smallsignal diagram for this circuit. (Hint: use Tmodels and
replace M3 with an appropriate resistor. Recall: Tmodels have 0 gate current!) d) [1 pt] Find the value for the smallsignal parameters gm], gmz, gmg, and gm4.
e) [2 pts.] Derive an expression for the gain V02/Vs and compute its value 1) [2 pts] Derive an expression for the gain val/vs and compute its value. Question #4 (10 pts.): Consider the case of two inverters in series, as shown in Fig 4. You may assume that the
P and N transistors are matched in each inverter. Fig. 4 You may use the following values:
VCC = 5V IVCE_SAT = 0.2V for all BJTs [th = IV for all FETs. a) [2 pts] Describe the mode of operation (cutoff, triode, saturation or active) of the
four transistors (Qp, QN, Mp, MN) when the input is 0V. b) [1 pt] Sketch what the voltage transfer characteristic of this device will look like
for inputs between 0V and 5V (you do not need to calculate VIL and VIH). For parts c), d) and e) you must include the Early Effect and CLM c) [3 pts] Draw a smallsignal model for this circuit assuming all BJT’s are active
and all FETs are in saturation. (Do not calculate any values) (1) [2 pts] Assuming a smallsignal voltage viﬂ at “IN”, show that the overall gain
vow/v.n is ngroQgmMroM where ‘Q’ and ‘M’ denote BJTs and F ETs, respectively. e) [2 pts] The gain expression found in part (I) does NOT depend on the DC biasing
conditions of the BJTs (as long as they are active), but DOES depend on the DC
biasing around the FETs. Explain why this is so. (Hint: check the formula sheets
for clues). Question 5 (10 pts.): Consider the following circuit. All FETs are operating in saturation. You must decide for
each FET whether or not to include Channel Length Modulation and the Body Effect in
your analysis. VDD vout a) [1 pt.] This is a 3stage ampliﬁer. Identify the topology of each stage as commongate
(CGA), commonsource (CSA) or commondrain (CDA). b) [3 pts.] Draw the small signal equivalent circuit.
c) [1 pt.] Find an expression for vx/vm. d) [1 pt.] Find an expression for vy/vx. e) [1 pt.] Find an expression for van/vy. f) [1 pt.] Find an expression for Rom. g) [2 pt.] Find an expression for Raw. Question #6 (11 pts): Consider the BipolaraMOSFET circuit shown in Fig. 6. Use the rules established in class
to determine if you must include channellength modulation and the Early Effect.
Neglect the body effect for all transistors. Assume the constant voltage drop model for
all BJTs (IVbei = 0.7) and a threshold voltage th = 0.6V for all FETs. 3.3V 2V 3V You may use the following values:
Wz/Lz = 1 it = 0.05V'1 K..’ = 2*Kp’ = lmA/V2
I5 = 00 VA = 60V ch.s‘n‘ = 0.2V a) [2 pts] Find W1/L1 so that M1 is at the edge of triode and saturation operation. b) [1 pt] With respect to the value found in a), would increasing W1/Ll put M1 in the
triode or saturation mode of operation? c) [3 pts] Find the value of R3 that will result in a maximally symmetric voltage
swing at the collector of Q1. (Hint: Solve V052 ﬁrst) For parts d) and e), do not solve for the smallsignal parameters or calculate your
answer. Include the output resistance of the currentsource Inns. d) [2 pts] Draw the smallsignal model for the circuit of Fig. 6. (Hint: Remember
that B = 00 for those BJT’s, so 13 = 0)
e) [3 pts] Express the voltage gain vow/vs. FORMULA SHEETS Diodes:
1': IS exp(v/nVT — 1) rd = th/ID BJTs: iC =13 GXPQBE/ 1C 13
ﬂ ,6+1
iE =(ﬂ+1)i3
gm :J9 I; :16; :aI/T—
VT IE
[B gm 1C
I;r =(ﬂ+l)re
16:..i =1 ﬂ+1 FETs: NMOS:
Cutoff: VGS < Vt , ID = 0
. r , W
Tnode: VGS > V, ID = k,1 TKVGS — V,)VDS — é—VDZS]
VDS < VGS _ V:
V > V .
Saturation: GS ‘ ID = H; gums  V,)2 (1 + AVDS ) VDS > VGS —V l Body effect: Vt = V10 + y(m— 1’2¢f) PMOS:
Cutoff:
1 z
. , W
Trmde: VGS < V’ ID = kpkaGS ‘14) DS _%V1§s]
VDS > VGS _ Vt
V < V
Saturation: GS ' ID = ~5~k;~’::(VGS —V,)2(1+/1VDS)
VDS < VGS — Vt Bodwffectt IK=IK0+7( 2¢f+1VSBIv~\/2¢f) SMALL SIGNAL , W
gm =k TU/GS 'le‘Fl'Vos) n gm =mgvl+l'VDS\/E r _ 1
o gmb=z.gm r 1 ‘ Z =—.______..._.,.
2 #2451 +VSB 10 ...
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