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OMAP-L137 - ECE 3551 Microcomputer Systems 1 OMAPL137...

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ECE 3551  Microcomputer Systems 1 OMAP-L137 Applications  Processor System
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Highlights u Dual Core SoC n 375/456-MHz ARM926EJ-S  RISC MPU n 375/456-MHz C674x VLIW DSP u TMS320C674x Fixed/Floating-Point VLIW  DSP Core u Enhanced Direct-Memory-Access  Controller 3 (EDMA3) u 128K-Byte RAM Shared Memory u Two External Memory Interfaces u Three Configurable 16550 type UART  Modules 2/11/12 Veton K ë puska 2
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Highlights u Two Serial Peripheral Interfaces (SPI) u Multimedia Card (MMC)/Secure Digital  (SD) u Two Master/Slave Inter-Integrated Circuit u One Host-Port Interface (HPI) u USB 1.1 OHCI (Host) With Integrated PHY  (USB1) 2/11/12 Veton K ë puska 3
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OMAP-L137 Applications  Processor System u Describes the System-on-Chip (SoC)  system. The SoC system includes TI’s  standard TMS320C674x and several blocks  of internal memory (L1P, L1D, and L2):  u ARM subsystem u DSP subsystem u System interconnect u System memory u Memory protection unit  (MPU) u Device clocking u Phase-locked loop controller  (PLLC) u Power and sleep controller  (PSC) u Power management u System configuration  (SYSCFG) module u ARM interrupt controller  (AINTC) u  Boot considerations 2/11/12 Veton K ë puska 4
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Outline 2/11/12 Veton K ë puska 5
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Outline 2/11/12 Veton K ë puska 6
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Introduction u The OMAP-L137 Applications Processor contains two primary  CPU cores:  n an ARM RISC CPU for general-purpose  processing and systems control; and  n a powerful DSP to efficiently handle  communication and audio processing tasks.  u The OMAP-L137 Applications Processor consists of the following  primary components: n ARM926 RISC CPU core and associated  memories n DSP and associated memories n A set of I/O peripherals n A powerful DMA subsystem and SDRAM EMIF  interface 2/11/12 Veton K ë puska 7
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Outline 2/11/12 Veton K ë puska 8
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Block Diagram 2/11/12 Veton K ë puska 9
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DPS Subsystem u The DSP subsystem (DSPSS) includes TI’s  standard TMS320C674x module and  several blocks of internal memory: L1P,  L1D, and L2. 2/11/12 Veton K ë puska 11
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ARM Subsystem u The ARM926EJ 32-bit RISC CPU in the  ARM subsystem (ARMSS) acts as the  overall system controller. u The ARM CPU performs general system  control tasks, such as system initialization,  configuration, power management, user  interface, and user command  implementation. 2/11/12 Veton K ë puska 13
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Arm Subsystem 2/11/12 Veton K ë puska 14
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Arm Subsystem 2/11/12 Veton K ë puska 15
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Introduction u The ARM subsystem consists of the  following components: u ARM926EJ-S - 32-bit RISC processor u 16-kB Instruction cache u 16-kB Data cache u Memory management unit (MMU) u CP15 to control MMU, cache, etc.
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