Lab10 - ECE1551 Digital Logic Lab (SR Flip Flop) S-R Flip...

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1 ECE1551 – Digital Logic Lab (SR Flip Flop) S-R Flip Flop 1. Let’s consider flight attendant Call-button system illustrated below figure. Pressing Call turns on the light, which stays on after Call is released. Pressing Cancel turns off the light. 2. Flight attendant Call-button system might be implemented using SR Flip Flop. 3. Complete the SR project with following steps. (1) Create New Project for SR Flip Flop Lab in Xilinx ISE 8.1i. Call Button Cancel Button SR Flip Flop Blue Light S (Set) R (Reset) Call Button Cancel Button Bit Storage Blue Light
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2 (2) Draw “SR Flip Flop” digital logic circuit in Schematic. (3) Initialize timing for input bits in Test Bench Waveform Below screen is one example of initial timing
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3 (4) Run the designed circuit through ModelSim Simulator Compare simulation result with flight attendant Call button system or lecture notes Below screen is the simulation result with previous initial timing (5) Save your circuit design, initial timing, and modelsim result as image files and link to your webpage
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This note was uploaded on 02/11/2012 for the course ECE 1551 taught by Professor Hadjilogiou during the Fall '11 term at FIT.

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Lab10 - ECE1551 Digital Logic Lab (SR Flip Flop) S-R Flip...

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