lab3 - EE 271 Lab 3 Digital Design using FPGAs University...

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EE 271 Lab 3 Digital Design using FPGAs University of Washington - Department of Electrical Engineering Lab Objectives Now that you know how to enter designs, and wire them together on the proto board, we can now start looking at more complex designs. Also, instead of wiring things by hand, we’ll start making use of the FPGA as a universal, automatic circuit board. USB Blaster In this section you will start downloading designs to the DE1 board. To do this, you need to connect the DE1 via the USB-blaster cable (in your kit) to a PC. If you are using the department machines this will already be set up for you. If you are using your own machine, the machine needs a USB port, and you need to install the USB Blaster driver. The Altera website has documentation on installing the USB-Blaster (the PC to FPGA cable) at < http://www.altera.com/literature/ug/ug_usb_blstr.pdf >, which is also available on the 271 website. For installing USB Drivers in Windows 7, please go to < http://www.altera.com/download/drivers/usb-blaster/dri-usb-blaster-vista.html >. This will guide you in installing the right driver for your machine. If the Found New Hardware dialog box does not pop up, right-click on My Computer from your desktop or Windows Explorer, and select Manage. From the Computer Management window, select Device Manager in the left pane. In the middle pane, find USB device and click on it. Then follow steps 5-12 on the website. If you cannot get this to work, you can still use the machines within the EE department. Assigned Task – Mapping Designs to FPGAs Go to a machine with Quartus II software installed on it. You should read and follow along with the tutorial in chapter C of the book, up to (but not including) C.1.4. When you are specifying the chip, you should select the device family “Cyclone II”, device “EP2C20F484C7”, which is the chip found on your DE-1 board. When you get to C.1.3, remember that simulation is done within the U.P. Simulator now and
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lab3 - EE 271 Lab 3 Digital Design using FPGAs University...

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