syllabus - 10% for 24 hours late, 30% for 48 hours late,...

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EE 271 – Introduction to Digital Circuits and Systems Winter 2012 Instructor: Prof. Scott Hauck ( EEB-307Q Office hours: By appointment (send email w/availability or stop by) TAs: Matt Staniszewski ( EEB-371 Xinhang Shao ( EEB-371 TA Lab Hours: Most of the day - see website Text: Stephen Brown and Zvonko Vranesic, Fundamentals of Digital Logic with Verilog Design (2 nd edition) is required. Transparencies will be provided on the website. Topics Covered: Introductory course in digital logic, Boolean algebra, combinational and sequential circuits, combinational and sequential logic design, and programmable logic devices. Prerequisites: CSE 142. Homework: Homework will be due at the end of class on the date specified. Late work will be penalized
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Unformatted text preview: 10% for 24 hours late, 30% for 48 hours late, 60% for 72 hours late, and not accepted beyond that. Laboratory: Each student will complete eight laboratory assignments using the DE-1 laboratory kit. This will include the testing of basic TTL devices, use of TTL and programmable devices for the creation of combinational and sequential logic, and the creation of a moderately complex final project. Projects can be done at home or in the department computing or hardware labs. Exams: There will be one midterm (Fri, 2/17) and a final exam (Wed, 3/14 8:30-10:20). Grades: The grade will be determined by the following approximate weights: homework (20%), labs (30%), midterm exam (20%), and final exam (30%). Website:
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